Searched refs:mec_hdr (Results 1 - 10 of 10) sorted by relevance
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
H A D | gfx_v11_0.c | 2400 const struct gfx_firmware_header_v2_0 *mec_hdr; in gfx_v11_0_config_mec_cache_rs64() local 2402 mec_hdr = (const struct gfx_firmware_header_v2_0 *) in gfx_v11_0_config_mec_cache_rs64() 2425 mec_hdr->ucode_start_addr_lo >> 2 | in gfx_v11_0_config_mec_cache_rs64() 2426 mec_hdr->ucode_start_addr_hi << 30); in gfx_v11_0_config_mec_cache_rs64() 2428 mec_hdr->ucode_start_addr_hi >> 2); in gfx_v11_0_config_mec_cache_rs64() 2482 const struct gfx_firmware_header_v2_0 *mec_hdr; in gfx_v11_0_config_gfx_rs64() local 2485 mec_hdr = (const struct gfx_firmware_header_v2_0 *) in gfx_v11_0_config_gfx_rs64() 2540 mec_hdr->ucode_start_addr_lo >> 2 | in gfx_v11_0_config_gfx_rs64() 2541 mec_hdr->ucode_start_addr_hi << 30); in gfx_v11_0_config_gfx_rs64() 2543 mec_hdr in gfx_v11_0_config_gfx_rs64() 3385 const struct gfx_firmware_header_v1_0 *mec_hdr; gfx_v11_0_cp_compute_load_microcode() local 3436 const struct gfx_firmware_header_v2_0 *mec_hdr; gfx_v11_0_cp_compute_load_microcode_rs64() local [all...] |
H A D | gfx_v9_4_3.c | 459 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_4_3_mec_init() local 497 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_4_3_mec_init() 501 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_4_3_mec_init() 502 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes); in gfx_v9_4_3_mec_init() 504 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v9_4_3_mec_init() 1397 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_4_3_xcc_cp_compute_load_microcode() local 1409 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_4_3_xcc_cp_compute_load_microcode() 1410 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v9_4_3_xcc_cp_compute_load_microcode() 1414 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_4_3_xcc_cp_compute_load_microcode() 1431 WREG32(mec_ucode_addr_offset, mec_hdr in gfx_v9_4_3_xcc_cp_compute_load_microcode() [all...] |
H A D | gfx_v9_0.c | 1690 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_0_mec_init() local 1716 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_0_mec_init() 1720 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_mec_init() 1721 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes); in gfx_v9_0_mec_init() 1723 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v9_0_mec_init() 3176 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_0_cp_compute_load_microcode() local 3186 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_0_cp_compute_load_microcode() 3187 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v9_0_cp_compute_load_microcode() 3191 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_cp_compute_load_microcode() 3204 mec_hdr in gfx_v9_0_cp_compute_load_microcode() [all...] |
H A D | gfx_v7_0.c | 2649 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v7_0_cp_compute_load_microcode() local 2656 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v7_0_cp_compute_load_microcode() 2657 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v7_0_cp_compute_load_microcode() 2658 adev->gfx.mec_fw_version = le32_to_cpu(mec_hdr->header.ucode_version); in gfx_v7_0_cp_compute_load_microcode() 2660 mec_hdr->ucode_feature_version); in gfx_v7_0_cp_compute_load_microcode() 2667 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v7_0_cp_compute_load_microcode() 2668 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in gfx_v7_0_cp_compute_load_microcode()
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H A D | gfx_v10_0.c | 4196 const struct gfx_firmware_header_v1_0 *mec_hdr = NULL; in gfx_v10_0_mec_init() local 4223 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v10_0_mec_init() 4226 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_mec_init() 4227 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes); in gfx_v10_0_mec_init() 4229 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v10_0_mec_init() 6230 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v10_0_cp_compute_load_microcode() local 6241 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v10_0_cp_compute_load_microcode() 6242 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v10_0_cp_compute_load_microcode() 6246 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_cp_compute_load_microcode() 6284 for (i = 0; i < mec_hdr in gfx_v10_0_cp_compute_load_microcode() [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
H A D | gfx_v9_0.c | 1962 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_0_mec_init() local 1987 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_0_mec_init() 1991 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_mec_init() 1992 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes); in gfx_v9_0_mec_init() 1994 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v9_0_mec_init() 3345 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_0_cp_compute_load_microcode() local 3355 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_0_cp_compute_load_microcode() 3356 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v9_0_cp_compute_load_microcode() 3360 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_cp_compute_load_microcode() 3373 mec_hdr in gfx_v9_0_cp_compute_load_microcode() [all...] |
H A D | gfx_v7_0.c | 2717 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v7_0_cp_compute_load_microcode() local 2724 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v7_0_cp_compute_load_microcode() 2725 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v7_0_cp_compute_load_microcode() 2726 adev->gfx.mec_fw_version = le32_to_cpu(mec_hdr->header.ucode_version); in gfx_v7_0_cp_compute_load_microcode() 2728 mec_hdr->ucode_feature_version); in gfx_v7_0_cp_compute_load_microcode() 2735 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v7_0_cp_compute_load_microcode() 2736 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in gfx_v7_0_cp_compute_load_microcode()
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H A D | gfx_v10_0.c | 4090 const struct gfx_firmware_header_v1_0 *mec_hdr = NULL; in gfx_v10_0_mec_init() local 4117 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v10_0_mec_init() 4120 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_mec_init() 4121 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes); in gfx_v10_0_mec_init() 4123 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v10_0_mec_init() 6028 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v10_0_cp_compute_load_microcode() local 6039 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v10_0_cp_compute_load_microcode() 6040 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v10_0_cp_compute_load_microcode() 6044 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_cp_compute_load_microcode() 6082 for (i = 0; i < mec_hdr in gfx_v10_0_cp_compute_load_microcode() [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
H A D | cik.c | 4266 const struct gfx_firmware_header_v1_0 *mec_hdr = in cik_cp_compute_load_microcode() local 4271 radeon_ucode_print_gfx_hdr(&mec_hdr->header); in cik_cp_compute_load_microcode() 4275 (rdev->mec_fw->data + le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in cik_cp_compute_load_microcode() 4276 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in cik_cp_compute_load_microcode() 4280 WREG32(CP_MEC_ME1_UCODE_ADDR, le32_to_cpu(mec_hdr->header.ucode_version)); in cik_cp_compute_load_microcode()
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/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
H A D | cik.c | 4256 const struct gfx_firmware_header_v1_0 *mec_hdr = in cik_cp_compute_load_microcode() local 4261 radeon_ucode_print_gfx_hdr(&mec_hdr->header); in cik_cp_compute_load_microcode() 4265 (rdev->mec_fw->data + le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in cik_cp_compute_load_microcode() 4266 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in cik_cp_compute_load_microcode() 4270 WREG32(CP_MEC_ME1_UCODE_ADDR, le32_to_cpu(mec_hdr->header.ucode_version)); in cik_cp_compute_load_microcode()
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