| /kernel/linux/linux-5.10/drivers/edac/ |
| H A D | i10nm_base.c | 151 u32 mcmtr; in i10nm_check_ecc() local
153 mcmtr = I10NM_GET_MCMTR(imc, chan); in i10nm_check_ecc()
154 edac_dbg(1, "ch%d mcmtr reg %x\n", chan, mcmtr); in i10nm_check_ecc()
156 return !!GET_BITFIELD(mcmtr, 2, 2); in i10nm_check_ecc()
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| H A D | skx_base.c | 172 static bool skx_check_ecc(u32 mcmtr) in skx_check_ecc() argument
174 return !!GET_BITFIELD(mcmtr, 2, 2); in skx_check_ecc()
180 u32 mtr, mcmtr, amap, mcddrtcfg; in skx_get_dimm_config() local
186 /* Only the mcmtr on the first channel is effective */ in skx_get_dimm_config()
187 pci_read_config_dword(imc->chan[0].cdev, 0x87c, &mcmtr); in skx_get_dimm_config()
198 ndimms += skx_get_dimm_info(mtr, mcmtr, amap, dimm, imc, i, j); in skx_get_dimm_config()
205 if (ndimms && !skx_check_ecc(mcmtr)) { in skx_get_dimm_config()
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| H A D | skx_common.h | 138 int skx_get_dimm_info(u32 mtr, u32 mcmtr, u32 amap, struct dimm_info *dimm,
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| H A D | skx_common.c | 306 int skx_get_dimm_info(u32 mtr, u32 mcmtr, u32 amap, struct dimm_info *dimm, in skx_get_dimm_info() argument
326 imc->chan[chan].dimms[dimmno].close_pg = GET_BITFIELD(mcmtr, 0, 0); in skx_get_dimm_info()
327 imc->chan[chan].dimms[dimmno].bank_xor_enable = GET_BITFIELD(mcmtr, 9, 9); in skx_get_dimm_info()
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| H A D | sb_edac.c | 196 #define IS_ECC_ENABLED(mcmtr) GET_BITFIELD(mcmtr, 2, 2)
197 #define IS_LOCKSTEP_ENABLED(mcmtr) GET_BITFIELD(mcmtr, 1, 1)
198 #define IS_CLOSE_PG(mcmtr) GET_BITFIELD(mcmtr, 0, 0)
316 u32 mcmtr; member
1631 if (!IS_ECC_ENABLED(pvt->info.mcmtr)) { in __populate_dimms()
1697 if (pci_read_config_dword(pvt->pci_ta, KNL_MCMTR, &pvt->info.mcmtr)) { in get_dimm_config()
1727 if (pci_read_config_dword(pvt->pci_ta, MCMTR, &pvt->info.mcmtr)) { in get_dimm_config()
[all...] |
| /kernel/linux/linux-6.6/drivers/edac/ |
| H A D | i10nm_base.c | 670 u32 mcmtr; in i10nm_imc_absent() local
676 mcmtr = I10NM_GET_MCMTR(imc, i); in i10nm_imc_absent()
677 edac_dbg(1, "ch%d mcmtr reg %x\n", i, mcmtr); in i10nm_imc_absent()
678 if (mcmtr != ~0) in i10nm_imc_absent()
689 * if its MMIO register "mcmtr" == ~0 in all its channels. in i10nm_imc_absent()
782 u32 reg, off, mcmtr; in i10nm_get_hbm_munits() local
841 mcmtr = I10NM_GET_MCMTR(&d->imc[lmc], 0); in i10nm_get_hbm_munits()
842 if (!I10NM_IS_HBM_IMC(mcmtr)) { in i10nm_get_hbm_munits()
960 u32 mcmtr; in i10nm_check_ecc() local
[all...] |
| H A D | skx_base.c | 172 static bool skx_check_ecc(u32 mcmtr) in skx_check_ecc() argument
174 return !!GET_BITFIELD(mcmtr, 2, 2); in skx_check_ecc()
180 u32 mtr, mcmtr, amap, mcddrtcfg; in skx_get_dimm_config() local
186 /* Only the mcmtr on the first channel is effective */ in skx_get_dimm_config()
187 pci_read_config_dword(imc->chan[0].cdev, 0x87c, &mcmtr); in skx_get_dimm_config()
198 ndimms += skx_get_dimm_info(mtr, mcmtr, amap, dimm, imc, i, j, cfg); in skx_get_dimm_config()
205 if (ndimms && !skx_check_ecc(mcmtr)) { in skx_get_dimm_config()
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| H A D | skx_common.c | 343 int skx_get_dimm_info(u32 mtr, u32 mcmtr, u32 amap, struct dimm_info *dimm, in skx_get_dimm_info() argument
376 imc->chan[chan].dimms[dimmno].close_pg = GET_BITFIELD(mcmtr, 0, 0); in skx_get_dimm_info()
377 imc->chan[chan].dimms[dimmno].bank_xor_enable = GET_BITFIELD(mcmtr, 9, 9); in skx_get_dimm_info()
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| H A D | sb_edac.c | 196 #define IS_ECC_ENABLED(mcmtr) GET_BITFIELD(mcmtr, 2, 2)
197 #define IS_LOCKSTEP_ENABLED(mcmtr) GET_BITFIELD(mcmtr, 1, 1)
198 #define IS_CLOSE_PG(mcmtr) GET_BITFIELD(mcmtr, 0, 0)
316 u32 mcmtr; member
1639 if (!IS_ECC_ENABLED(pvt->info.mcmtr)) { in __populate_dimms()
1675 GET_BITFIELD(pvt->info.mcmtr, 9, 9); in __populate_dimms()
1710 if (pci_read_config_dword(pvt->pci_ta, KNL_MCMTR, &pvt->info.mcmtr)) { in get_dimm_config()
[all...] |
| H A D | skx_common.h | 246 int skx_get_dimm_info(u32 mtr, u32 mcmtr, u32 amap, struct dimm_info *dimm,
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