| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | fiji_smumgr.c | 2564 struct SMU73_Discrete_MemoryLevel *mclk_levels = in fiji_update_dpm_settings() local
2613 if (mclk_levels[i].ActivityLevel != in fiji_update_dpm_settings()
2615 mclk_levels[i].ActivityLevel = cpu_to_be16(setting->mclk_activity); in fiji_update_dpm_settings()
2621 tmp = phm_set_field_to_u32(clk_activity_offset, tmp, mclk_levels[i].ActivityLevel, sizeof(uint16_t)); in fiji_update_dpm_settings()
2625 if (mclk_levels[i].UpHyst != setting->mclk_up_hyst || in fiji_update_dpm_settings()
2626 mclk_levels[i].DownHyst != setting->mclk_down_hyst) { in fiji_update_dpm_settings()
2627 mclk_levels[i].UpHyst = setting->mclk_up_hyst; in fiji_update_dpm_settings()
2628 mclk_levels[i].DownHyst = setting->mclk_down_hyst; in fiji_update_dpm_settings()
2635 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in fiji_update_dpm_settings()
2636 tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[ in fiji_update_dpm_settings()
[all...] |
| H A D | ci_smumgr.c | 2772 struct SMU7_Discrete_MemoryLevel *mclk_levels = in ci_update_dpm_settings() local
2821 if (mclk_levels[i].ActivityLevel != in ci_update_dpm_settings()
2823 mclk_levels[i].ActivityLevel = cpu_to_be16(setting->mclk_activity); in ci_update_dpm_settings()
2829 tmp = phm_set_field_to_u32(clk_activity_offset, tmp, mclk_levels[i].ActivityLevel, sizeof(uint16_t)); in ci_update_dpm_settings()
2833 if (mclk_levels[i].UpH != setting->mclk_up_hyst || in ci_update_dpm_settings()
2834 mclk_levels[i].DownH != setting->mclk_down_hyst) { in ci_update_dpm_settings()
2835 mclk_levels[i].UpH = setting->mclk_up_hyst; in ci_update_dpm_settings()
2836 mclk_levels[i].DownH = setting->mclk_down_hyst; in ci_update_dpm_settings()
2843 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpH, sizeof(uint8_t)); in ci_update_dpm_settings()
2844 tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[ in ci_update_dpm_settings()
[all...] |
| H A D | tonga_smumgr.c | 3161 struct SMU72_Discrete_MemoryLevel *mclk_levels = in tonga_update_dpm_settings() local
3210 if (mclk_levels[i].ActivityLevel != in tonga_update_dpm_settings()
3212 mclk_levels[i].ActivityLevel = cpu_to_be16(setting->mclk_activity); in tonga_update_dpm_settings()
3218 tmp = phm_set_field_to_u32(clk_activity_offset, tmp, mclk_levels[i].ActivityLevel, sizeof(uint16_t)); in tonga_update_dpm_settings()
3222 if (mclk_levels[i].UpHyst != setting->mclk_up_hyst || in tonga_update_dpm_settings()
3223 mclk_levels[i].DownHyst != setting->mclk_down_hyst) { in tonga_update_dpm_settings()
3224 mclk_levels[i].UpHyst = setting->mclk_up_hyst; in tonga_update_dpm_settings()
3225 mclk_levels[i].DownHyst = setting->mclk_down_hyst; in tonga_update_dpm_settings()
3232 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in tonga_update_dpm_settings()
3233 tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[ in tonga_update_dpm_settings()
[all...] |
| H A D | polaris10_smumgr.c | 2482 struct SMU74_Discrete_MemoryLevel *mclk_levels = in polaris10_update_dpm_settings() local
2531 if (mclk_levels[i].ActivityLevel != in polaris10_update_dpm_settings()
2533 mclk_levels[i].ActivityLevel = cpu_to_be16(setting->mclk_activity); in polaris10_update_dpm_settings()
2539 tmp = phm_set_field_to_u32(clk_activity_offset, tmp, mclk_levels[i].ActivityLevel, sizeof(uint16_t)); in polaris10_update_dpm_settings()
2543 if (mclk_levels[i].UpHyst != setting->mclk_up_hyst || in polaris10_update_dpm_settings()
2544 mclk_levels[i].DownHyst != setting->mclk_down_hyst) { in polaris10_update_dpm_settings()
2545 mclk_levels[i].UpHyst = setting->mclk_up_hyst; in polaris10_update_dpm_settings()
2546 mclk_levels[i].DownHyst = setting->mclk_down_hyst; in polaris10_update_dpm_settings()
2553 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in polaris10_update_dpm_settings()
2554 tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[ in polaris10_update_dpm_settings()
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | fiji_smumgr.c | 2562 struct SMU73_Discrete_MemoryLevel *mclk_levels = in fiji_update_dpm_settings() local
2611 if (mclk_levels[i].ActivityLevel != in fiji_update_dpm_settings()
2613 mclk_levels[i].ActivityLevel = cpu_to_be16(setting->mclk_activity); in fiji_update_dpm_settings()
2619 tmp = phm_set_field_to_u32(clk_activity_offset, tmp, mclk_levels[i].ActivityLevel, sizeof(uint16_t)); in fiji_update_dpm_settings()
2623 if (mclk_levels[i].UpHyst != setting->mclk_up_hyst || in fiji_update_dpm_settings()
2624 mclk_levels[i].DownHyst != setting->mclk_down_hyst) { in fiji_update_dpm_settings()
2625 mclk_levels[i].UpHyst = setting->mclk_up_hyst; in fiji_update_dpm_settings()
2626 mclk_levels[i].DownHyst = setting->mclk_down_hyst; in fiji_update_dpm_settings()
2633 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in fiji_update_dpm_settings()
2634 tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[ in fiji_update_dpm_settings()
[all...] |
| H A D | tonga_smumgr.c | 3161 struct SMU72_Discrete_MemoryLevel *mclk_levels = in tonga_update_dpm_settings() local
3210 if (mclk_levels[i].ActivityLevel != in tonga_update_dpm_settings()
3212 mclk_levels[i].ActivityLevel = cpu_to_be16(setting->mclk_activity); in tonga_update_dpm_settings()
3218 tmp = phm_set_field_to_u32(clk_activity_offset, tmp, mclk_levels[i].ActivityLevel, sizeof(uint16_t)); in tonga_update_dpm_settings()
3222 if (mclk_levels[i].UpHyst != setting->mclk_up_hyst || in tonga_update_dpm_settings()
3223 mclk_levels[i].DownHyst != setting->mclk_down_hyst) { in tonga_update_dpm_settings()
3224 mclk_levels[i].UpHyst = setting->mclk_up_hyst; in tonga_update_dpm_settings()
3225 mclk_levels[i].DownHyst = setting->mclk_down_hyst; in tonga_update_dpm_settings()
3232 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in tonga_update_dpm_settings()
3233 tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[ in tonga_update_dpm_settings()
[all...] |
| H A D | polaris10_smumgr.c | 2600 struct SMU74_Discrete_MemoryLevel *mclk_levels = in polaris10_update_dpm_settings() local
2649 if (mclk_levels[i].ActivityLevel != in polaris10_update_dpm_settings()
2651 mclk_levels[i].ActivityLevel = cpu_to_be16(setting->mclk_activity); in polaris10_update_dpm_settings()
2657 tmp = phm_set_field_to_u32(clk_activity_offset, tmp, mclk_levels[i].ActivityLevel, sizeof(uint16_t)); in polaris10_update_dpm_settings()
2661 if (mclk_levels[i].UpHyst != setting->mclk_up_hyst || in polaris10_update_dpm_settings()
2662 mclk_levels[i].DownHyst != setting->mclk_down_hyst) { in polaris10_update_dpm_settings()
2663 mclk_levels[i].UpHyst = setting->mclk_up_hyst; in polaris10_update_dpm_settings()
2664 mclk_levels[i].DownHyst = setting->mclk_down_hyst; in polaris10_update_dpm_settings()
2671 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpHyst, sizeof(uint8_t)); in polaris10_update_dpm_settings()
2672 tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[ in polaris10_update_dpm_settings()
[all...] |
| H A D | ci_smumgr.c | 2773 struct SMU7_Discrete_MemoryLevel *mclk_levels = in ci_update_dpm_settings() local
2822 if (mclk_levels[i].ActivityLevel != in ci_update_dpm_settings()
2824 mclk_levels[i].ActivityLevel = cpu_to_be16(setting->mclk_activity); in ci_update_dpm_settings()
2830 tmp = phm_set_field_to_u32(clk_activity_offset, tmp, mclk_levels[i].ActivityLevel, sizeof(uint16_t)); in ci_update_dpm_settings()
2834 if (mclk_levels[i].UpH != setting->mclk_up_hyst || in ci_update_dpm_settings()
2835 mclk_levels[i].DownH != setting->mclk_down_hyst) { in ci_update_dpm_settings()
2836 mclk_levels[i].UpH = setting->mclk_up_hyst; in ci_update_dpm_settings()
2837 mclk_levels[i].DownH = setting->mclk_down_hyst; in ci_update_dpm_settings()
2844 tmp = phm_set_field_to_u32(up_hyst_offset, tmp, mclk_levels[i].UpH, sizeof(uint8_t)); in ci_update_dpm_settings()
2845 tmp = phm_set_field_to_u32(down_hyst_offset, tmp, mclk_levels[ in ci_update_dpm_settings()
[all...] |