/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/link/protocols/ |
H A D | link_dp_training_8b_10b.c | 39 const struct dc_link_settings *link_settings) in get_cr_training_aux_rd_interval() 45 if (link_dp_get_encoding_format(link_settings) == DP_8b_10b_ENCODING && in get_cr_training_aux_rd_interval() 60 const struct dc_link_settings *link_settings) in get_eq_training_aux_rd_interval() 65 if (link_dp_get_encoding_format(link_settings) == DP_128b_132b_ENCODING) { in get_eq_training_aux_rd_interval() 71 } else if (link_dp_get_encoding_format(link_settings) == DP_8b_10b_ENCODING && in get_eq_training_aux_rd_interval() 100 lt_settings->link_settings.use_link_rate_set = link_setting->use_link_rate_set; in decide_8b_10b_training_settings() 101 lt_settings->link_settings.link_rate_set = link_setting->link_rate_set; in decide_8b_10b_training_settings() 102 lt_settings->link_settings.link_rate = link_setting->link_rate; in decide_8b_10b_training_settings() 103 lt_settings->link_settings.lane_count = link_setting->lane_count; in decide_8b_10b_training_settings() 105 * lt_settings.link_settings in decide_8b_10b_training_settings() 38 get_cr_training_aux_rd_interval(struct dc_link *link, const struct dc_link_settings *link_settings) get_cr_training_aux_rd_interval() argument 58 get_eq_training_aux_rd_interval( struct dc_link *link, const struct dc_link_settings *link_settings) get_eq_training_aux_rd_interval() argument [all...] |
H A D | link_dp_training.c | 67 switch (lt_settings->link_settings.link_rate) { in dp_log_training_result() 152 switch (lt_settings->link_settings.link_spread) { in dp_log_training_result() 172 lt_settings->link_settings.lane_count, in dp_log_training_result() 313 for (lane = 1; lane < lt_settings->link_settings.lane_count; lane++) { in maximize_lane_settings() 358 if (link_dp_get_encoding_format(<_settings->link_settings) == in dp_hw_to_dpcd_lane_settings() 370 } else if (link_dp_get_encoding_format(<_settings->link_settings) == in dp_hw_to_dpcd_lane_settings() 378 uint8_t get_dpcd_link_rate(const struct dc_link_settings *link_settings) in get_dpcd_link_rate() argument 381 enum dp_link_encoding encoding = link_dp_get_encoding_format(link_settings); in get_dpcd_link_rate() 384 switch (link_settings->link_rate) { in get_dpcd_link_rate() 399 link_rate = (uint8_t) link_settings in get_dpcd_link_rate() 750 decide_cr_training_pattern( const struct dc_link_settings *link_settings) decide_cr_training_pattern() argument 762 decide_eq_training_pattern(struct dc_link *link, const struct dc_link_settings *link_settings) decide_eq_training_pattern() argument 846 dp_decide_training_settings( struct dc_link *link, const struct dc_link_settings *link_settings, struct link_training_settings *lt_settings) dp_decide_training_settings() argument 1476 dp_perform_link_training( struct dc_link *link, const struct link_resource *link_res, const struct dc_link_settings *link_settings, bool skip_video_pattern) dp_perform_link_training() argument [all...] |
H A D | link_dp_phy.c | 62 const struct dc_link_settings *link_settings) in dp_enable_link_phy() 64 link->cur_link_settings = *link_settings; in dp_enable_link_phy() 66 clock_source, link_settings); in dp_enable_link_phy() 98 const struct link_training_settings *link_settings, in dp_set_hw_lane_settings() 103 if ((link_settings->lttpr_mode == LTTPR_MODE_NON_TRANSPARENT) && in dp_set_hw_lane_settings() 109 &link_settings->link_settings, in dp_set_hw_lane_settings() 110 link_settings->hw_lane_settings); in dp_set_hw_lane_settings() 113 link_settings->hw_lane_settings, in dp_set_hw_lane_settings() 57 dp_enable_link_phy( struct dc_link *link, const struct link_resource *link_res, enum signal_type signal, enum clock_source_id clock_source, const struct dc_link_settings *link_settings) dp_enable_link_phy() argument 95 dp_set_hw_lane_settings( struct dc_link *link, const struct link_resource *link_res, const struct link_training_settings *link_settings, uint32_t offset) dp_set_hw_lane_settings() argument
|
H A D | link_dp_training_fixed_vs_pe_retimer.c | 119 target_rate = get_dpcd_link_rate(<_settings->link_settings); in perform_fixed_vs_pe_nontransparent_training_sequence() 123 lt_settings->link_settings.link_rate = toggle_rate; in perform_fixed_vs_pe_nontransparent_training_sequence() 216 ASSERT(link_dp_get_encoding_format(<_settings->link_settings) == in dp_perform_fixed_vs_pe_training_sequence_legacy() 249 downspread.raw = (uint8_t)(lt_settings->link_settings.link_spread); in dp_perform_fixed_vs_pe_training_sequence_legacy() 252 lt_settings->link_settings.lane_count; in dp_perform_fixed_vs_pe_training_sequence_legacy() 269 rate = get_dpcd_link_rate(<_settings->link_settings); in dp_perform_fixed_vs_pe_training_sequence_legacy() 289 lt_settings->link_settings.link_rate, in dp_perform_fixed_vs_pe_training_sequence_legacy() 291 lt_settings->link_settings.lane_count, in dp_perform_fixed_vs_pe_training_sequence_legacy() 294 lt_settings->link_settings.link_spread); in dp_perform_fixed_vs_pe_training_sequence_legacy() 296 if (lt_settings->link_settings in dp_perform_fixed_vs_pe_training_sequence_legacy() [all...] |
H A D | link_dp_training_128b_132b.c | 118 } else if (dp_is_ch_eq_done(lt_settings->link_settings.lane_count, in dp_perform_128b_132b_channel_eq_done_sequence() 181 } else if (dp_is_symbol_locked(lt_settings->link_settings.lane_count, dpcd_lane_status) && in dp_perform_128b_132b_cds_done_sequence() 207 <_settings->link_settings, in dp_perform_128b_132b_link_training() 230 const struct dc_link_settings *link_settings, in decide_128b_132b_training_settings() 235 lt_settings->link_settings = *link_settings; in decide_128b_132b_training_settings() 236 /* TODO: should decide link spread when populating link_settings */ in decide_128b_132b_training_settings() 237 lt_settings->link_settings.link_spread = link->dp_ss_off ? LINK_SPREAD_DISABLED : in decide_128b_132b_training_settings() 240 lt_settings->pattern_for_cr = decide_cr_training_pattern(link_settings); in decide_128b_132b_training_settings() 241 lt_settings->pattern_for_eq = decide_eq_training_pattern(link, link_settings); in decide_128b_132b_training_settings() 229 decide_128b_132b_training_settings(struct dc_link *link, const struct dc_link_settings *link_settings, struct link_training_settings *lt_settings) decide_128b_132b_training_settings() argument [all...] |
H A D | link_dp_training.h | 42 const struct dc_link_settings *link_settings, 107 const struct dc_link_settings *link_settings, 117 const struct dc_link_settings *link_settings); 120 const struct dc_link_settings *link_settings); 152 uint8_t get_dpcd_link_rate(const struct dc_link_settings *link_settings);
|
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_link_encoder.c | 603 const struct dc_link_settings *link_settings) in configure_encoder() 608 DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE); in configure_encoder() 617 const struct dc_link_settings *link_settings) in dce60_configure_encoder() 622 DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE); in dce60_configure_encoder() 1123 const struct dc_link_settings *link_settings, in dce110_link_encoder_enable_dp_output() 1136 configure_encoder(enc110, link_settings); in dce110_link_encoder_enable_dp_output() 1143 cntl.lanes_number = link_settings->lane_count; in dce110_link_encoder_enable_dp_output() 1145 cntl.pixel_clock = link_settings->link_rate in dce110_link_encoder_enable_dp_output() 1162 const struct dc_link_settings *link_settings, in dce110_link_encoder_enable_dp_mst_output() 1175 configure_encoder(enc110, link_settings); in dce110_link_encoder_enable_dp_mst_output() 601 configure_encoder( struct dce110_link_encoder *enc110, const struct dc_link_settings *link_settings) configure_encoder() argument 615 dce60_configure_encoder( struct dce110_link_encoder *enc110, const struct dc_link_settings *link_settings) dce60_configure_encoder() argument 1121 dce110_link_encoder_enable_dp_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dce110_link_encoder_enable_dp_output() argument 1160 dce110_link_encoder_enable_dp_mst_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dce110_link_encoder_enable_dp_mst_output() argument 1200 dce60_link_encoder_enable_dp_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dce60_link_encoder_enable_dp_output() argument 1239 dce60_link_encoder_enable_dp_mst_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dce60_link_encoder_enable_dp_mst_output() argument 1325 dce110_link_encoder_dp_set_lane_settings( struct link_encoder *enc, const struct link_training_settings *link_settings) dce110_link_encoder_dp_set_lane_settings() argument 1667 dce110_link_encoder_get_max_link_cap(struct link_encoder *enc, struct dc_link_settings *link_settings) dce110_link_encoder_get_max_link_cap() argument [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/ |
H A D | dcn10_link_encoder.c | 492 const struct dc_link_settings *link_settings) in enc1_configure_encoder() 496 DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE); in enc1_configure_encoder() 961 const struct dc_link_settings *link_settings, in dcn10_link_encoder_enable_dp_output() 974 enc1_configure_encoder(enc10, link_settings); in dcn10_link_encoder_enable_dp_output() 981 cntl.lanes_number = link_settings->lane_count; in dcn10_link_encoder_enable_dp_output() 983 cntl.pixel_clock = link_settings->link_rate in dcn10_link_encoder_enable_dp_output() 1000 const struct dc_link_settings *link_settings, in dcn10_link_encoder_enable_dp_mst_output() 1013 enc1_configure_encoder(enc10, link_settings); in dcn10_link_encoder_enable_dp_mst_output() 1020 cntl.lanes_number = link_settings->lane_count; in dcn10_link_encoder_enable_dp_mst_output() 1022 cntl.pixel_clock = link_settings in dcn10_link_encoder_enable_dp_mst_output() 490 enc1_configure_encoder( struct dcn10_link_encoder *enc10, const struct dc_link_settings *link_settings) enc1_configure_encoder() argument 959 dcn10_link_encoder_enable_dp_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dcn10_link_encoder_enable_dp_output() argument 998 dcn10_link_encoder_enable_dp_mst_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dcn10_link_encoder_enable_dp_mst_output() argument 1086 dcn10_link_encoder_dp_set_lane_settings( struct link_encoder *enc, const struct link_training_settings *link_settings) dcn10_link_encoder_dp_set_lane_settings() argument 1434 dcn10_link_encoder_get_max_link_cap(struct link_encoder *enc, struct dc_link_settings *link_settings) dcn10_link_encoder_get_max_link_cap() argument [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/core/ |
H A D | dc_link_dp.c | 53 const struct dc_link_settings *link_settings) in get_cr_training_aux_rd_interval() 71 const struct dc_link_settings *link_settings) in get_eq_training_aux_rd_interval() 122 const struct dc_link_settings *link_settings) in decide_cr_training_pattern() 130 const struct dc_link_settings *link_settings) in decide_eq_training_pattern() 163 (lt_settings->link_settings.link_spread); in dpcd_set_link_settings() 166 lt_settings->link_settings.lane_count; in dpcd_set_link_settings() 184 lt_settings->link_settings.use_link_rate_set == true) { in dpcd_set_link_settings() 188 <_settings->link_settings.link_rate_set, 1); in dpcd_set_link_settings() 190 rate = (uint8_t) (lt_settings->link_settings.link_rate); in dpcd_set_link_settings() 198 lt_settings->link_settings in dpcd_set_link_settings() 52 get_cr_training_aux_rd_interval(struct dc_link *link, const struct dc_link_settings *link_settings) get_cr_training_aux_rd_interval() argument 69 get_eq_training_aux_rd_interval( struct dc_link *link, const struct dc_link_settings *link_settings) get_eq_training_aux_rd_interval() argument 121 decide_cr_training_pattern( const struct dc_link_settings *link_settings) decide_cr_training_pattern() argument 129 decide_eq_training_pattern(struct dc_link *link, const struct dc_link_settings *link_settings) decide_eq_training_pattern() argument 1737 dc_link_dp_sync_lt_attempt( struct dc_link *link, struct dc_link_settings *link_settings, struct dc_link_training_overrides *lt_overrides) dc_link_dp_sync_lt_attempt() argument 2140 struct dc_link_settings link_settings = {0}; get_common_supported_link_settings() local 2592 struct dc_link_settings link_settings = {0}; dp_test_send_link_training() local 2625 struct dc_link_training_settings link_settings; dp_test_send_phy_test_pattern() local [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/virtual/ |
H A D | virtual_link_encoder.c | 52 const struct dc_link_settings *link_settings, in virtual_link_encoder_enable_dp_output() 57 const struct dc_link_settings *link_settings, in virtual_link_encoder_enable_dp_mst_output() 66 const struct link_training_settings *link_settings) {} in virtual_link_encoder_dp_set_lane_settings() 88 struct dc_link_settings *link_settings) in virtual_link_encoder_get_max_link_cap() 93 *link_settings = max_link_cap; in virtual_link_encoder_get_max_link_cap() 50 virtual_link_encoder_enable_dp_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) virtual_link_encoder_enable_dp_output() argument 55 virtual_link_encoder_enable_dp_mst_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) virtual_link_encoder_enable_dp_mst_output() argument 64 virtual_link_encoder_dp_set_lane_settings( struct link_encoder *enc, const struct link_training_settings *link_settings) virtual_link_encoder_dp_set_lane_settings() argument 87 virtual_link_encoder_get_max_link_cap(struct link_encoder *enc, struct dc_link_settings *link_settings) virtual_link_encoder_get_max_link_cap() argument
|
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/virtual/ |
H A D | virtual_link_encoder.c | 50 const struct dc_link_settings *link_settings, in virtual_link_encoder_enable_dp_output() 55 const struct dc_link_settings *link_settings, in virtual_link_encoder_enable_dp_mst_output() 64 const struct dc_link_settings *link_settings, in virtual_link_encoder_dp_set_lane_settings() 87 struct dc_link_settings *link_settings) in virtual_link_encoder_get_max_link_cap() 92 *link_settings = max_link_cap; in virtual_link_encoder_get_max_link_cap() 48 virtual_link_encoder_enable_dp_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) virtual_link_encoder_enable_dp_output() argument 53 virtual_link_encoder_enable_dp_mst_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) virtual_link_encoder_enable_dp_mst_output() argument 62 virtual_link_encoder_dp_set_lane_settings( struct link_encoder *enc, const struct dc_link_settings *link_settings, const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) virtual_link_encoder_dp_set_lane_settings() argument 86 virtual_link_encoder_get_max_link_cap(struct link_encoder *enc, struct dc_link_settings *link_settings) virtual_link_encoder_get_max_link_cap() argument
|
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn31/ |
H A D | dcn31_dio_link_encoder.c | 452 const struct dc_link_settings *link_settings, in dcn31_link_encoder_enable_dp_output() 461 dcn20_link_encoder_enable_dp_output(enc, link_settings, clock_source); in dcn31_link_encoder_enable_dp_output() 470 enc1_configure_encoder(enc10, link_settings); in dcn31_link_encoder_enable_dp_output() 475 dpia_control.lanenum = (uint8_t)link_settings->lane_count; in dcn31_link_encoder_enable_dp_output() 476 dpia_control.symclk_10khz = link_settings->link_rate * in dcn31_link_encoder_enable_dp_output() 499 const struct dc_link_settings *link_settings, in dcn31_link_encoder_enable_dp_mst_output() 508 dcn10_link_encoder_enable_dp_mst_output(enc, link_settings, clock_source); in dcn31_link_encoder_enable_dp_mst_output() 517 enc1_configure_encoder(enc10, link_settings); in dcn31_link_encoder_enable_dp_mst_output() 522 dpia_control.lanenum = (uint8_t)link_settings->lane_count; in dcn31_link_encoder_enable_dp_mst_output() 523 dpia_control.symclk_10khz = link_settings in dcn31_link_encoder_enable_dp_mst_output() 450 dcn31_link_encoder_enable_dp_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dcn31_link_encoder_enable_dp_output() argument 497 dcn31_link_encoder_enable_dp_mst_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dcn31_link_encoder_enable_dp_mst_output() argument 636 dcn31_link_encoder_get_max_link_cap(struct link_encoder *enc, struct dc_link_settings *link_settings) dcn31_link_encoder_get_max_link_cap() argument [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn21/ |
H A D | dcn21_link_encoder.c | 172 const struct dc_link_settings *link_settings, in update_cfg_data() 184 switch (link_settings->link_rate) { in update_cfg_data() 199 __func__, link_settings->link_rate); in update_cfg_data() 256 const struct dc_link_settings *link_settings, in dcn21_link_encoder_enable_dp_output() 267 dcn10_link_encoder_enable_dp_output(enc, link_settings, clock_source); in dcn21_link_encoder_enable_dp_output() 271 if (!update_cfg_data(enc10, link_settings, cfg)) in dcn21_link_encoder_enable_dp_output() 274 enc1_configure_encoder(enc10, link_settings); in dcn21_link_encoder_enable_dp_output() 282 const struct dc_link_settings *link_settings, in dcn21_link_encoder_enable_dp_mst_output() 288 dcn10_link_encoder_enable_dp_mst_output(enc, link_settings, clock_source); in dcn21_link_encoder_enable_dp_mst_output() 170 update_cfg_data( struct dcn10_link_encoder *enc10, const struct dc_link_settings *link_settings, struct dpcssys_phy_seq_cfg *cfg) update_cfg_data() argument 254 dcn21_link_encoder_enable_dp_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dcn21_link_encoder_enable_dp_output() argument 280 dcn21_link_encoder_enable_dp_mst_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dcn21_link_encoder_enable_dp_mst_output() argument
|
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn21/ |
H A D | dcn21_link_encoder.c | 171 const struct dc_link_settings *link_settings, in update_cfg_data() 183 switch (link_settings->link_rate) { in update_cfg_data() 198 __func__, link_settings->link_rate); in update_cfg_data() 255 const struct dc_link_settings *link_settings, in dcn21_link_encoder_enable_dp_output() 266 dcn10_link_encoder_enable_dp_output(enc, link_settings, clock_source); in dcn21_link_encoder_enable_dp_output() 270 if (!update_cfg_data(enc10, link_settings, cfg)) in dcn21_link_encoder_enable_dp_output() 273 enc1_configure_encoder(enc10, link_settings); in dcn21_link_encoder_enable_dp_output() 281 const struct dc_link_settings *link_settings, in dcn21_link_encoder_enable_dp_mst_output() 287 dcn10_link_encoder_enable_dp_mst_output(enc, link_settings, clock_source); in dcn21_link_encoder_enable_dp_mst_output() 169 update_cfg_data( struct dcn10_link_encoder *enc10, const struct dc_link_settings *link_settings, struct dpcssys_phy_seq_cfg *cfg) update_cfg_data() argument 253 dcn21_link_encoder_enable_dp_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dcn21_link_encoder_enable_dp_output() argument 279 dcn21_link_encoder_enable_dp_mst_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dcn21_link_encoder_enable_dp_mst_output() argument
|
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_link_encoder.c | 599 const struct dc_link_settings *link_settings) in configure_encoder() 604 DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE); in configure_encoder() 613 const struct dc_link_settings *link_settings) in dce60_configure_encoder() 618 DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE); in dce60_configure_encoder() 1118 const struct dc_link_settings *link_settings, in dce110_link_encoder_enable_dp_output() 1131 configure_encoder(enc110, link_settings); in dce110_link_encoder_enable_dp_output() 1138 cntl.lanes_number = link_settings->lane_count; in dce110_link_encoder_enable_dp_output() 1140 cntl.pixel_clock = link_settings->link_rate in dce110_link_encoder_enable_dp_output() 1157 const struct dc_link_settings *link_settings, in dce110_link_encoder_enable_dp_mst_output() 1170 configure_encoder(enc110, link_settings); in dce110_link_encoder_enable_dp_mst_output() 597 configure_encoder( struct dce110_link_encoder *enc110, const struct dc_link_settings *link_settings) configure_encoder() argument 611 dce60_configure_encoder( struct dce110_link_encoder *enc110, const struct dc_link_settings *link_settings) dce60_configure_encoder() argument 1116 dce110_link_encoder_enable_dp_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dce110_link_encoder_enable_dp_output() argument 1155 dce110_link_encoder_enable_dp_mst_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dce110_link_encoder_enable_dp_mst_output() argument 1195 dce60_link_encoder_enable_dp_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dce60_link_encoder_enable_dp_output() argument 1234 dce60_link_encoder_enable_dp_mst_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dce60_link_encoder_enable_dp_mst_output() argument 1320 dce110_link_encoder_dp_set_lane_settings( struct link_encoder *enc, const struct dc_link_settings *link_settings, const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) dce110_link_encoder_dp_set_lane_settings() argument 1662 dce110_link_encoder_get_max_link_cap(struct link_encoder *enc, struct dc_link_settings *link_settings) dce110_link_encoder_get_max_link_cap() argument [all...] |
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_link_encoder.c | 214 const struct dc_link_settings *link_settings, in update_cfg_data() 221 for (i = 0; i < link_settings->lane_count; i++) in update_cfg_data() 224 switch (link_settings->link_rate) { in update_cfg_data() 239 __func__, link_settings->link_rate); in update_cfg_data() 248 const struct dc_link_settings *link_settings, in dcn20_link_encoder_enable_dp_output() 256 dcn10_link_encoder_enable_dp_output(enc, link_settings, clock_source); in dcn20_link_encoder_enable_dp_output() 260 if (!update_cfg_data(enc10, link_settings, cfg)) in dcn20_link_encoder_enable_dp_output() 263 enc1_configure_encoder(enc10, link_settings); in dcn20_link_encoder_enable_dp_output() 270 struct dc_link_settings *link_settings) in dcn20_link_encoder_get_max_link_cap() 275 dcn10_link_encoder_get_max_link_cap(enc, link_settings); in dcn20_link_encoder_get_max_link_cap() 212 update_cfg_data( struct dcn10_link_encoder *enc10, const struct dc_link_settings *link_settings, struct dpcssys_phy_seq_cfg *cfg) update_cfg_data() argument 246 dcn20_link_encoder_enable_dp_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dcn20_link_encoder_enable_dp_output() argument 269 dcn20_link_encoder_get_max_link_cap(struct link_encoder *enc, struct dc_link_settings *link_settings) dcn20_link_encoder_get_max_link_cap() argument [all...] |
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_link_encoder.c | 213 const struct dc_link_settings *link_settings, in update_cfg_data() 220 for (i = 0; i < link_settings->lane_count; i++) in update_cfg_data() 223 switch (link_settings->link_rate) { in update_cfg_data() 238 __func__, link_settings->link_rate); in update_cfg_data() 247 const struct dc_link_settings *link_settings, in dcn20_link_encoder_enable_dp_output() 255 dcn10_link_encoder_enable_dp_output(enc, link_settings, clock_source); in dcn20_link_encoder_enable_dp_output() 259 if (!update_cfg_data(enc10, link_settings, cfg)) in dcn20_link_encoder_enable_dp_output() 262 enc1_configure_encoder(enc10, link_settings); in dcn20_link_encoder_enable_dp_output() 269 struct dc_link_settings *link_settings) in dcn20_link_encoder_get_max_link_cap() 274 dcn10_link_encoder_get_max_link_cap(enc, link_settings); in dcn20_link_encoder_get_max_link_cap() 211 update_cfg_data( struct dcn10_link_encoder *enc10, const struct dc_link_settings *link_settings, struct dpcssys_phy_seq_cfg *cfg) update_cfg_data() argument 245 dcn20_link_encoder_enable_dp_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dcn20_link_encoder_enable_dp_output() argument 268 dcn20_link_encoder_get_max_link_cap(struct link_encoder *enc, struct dc_link_settings *link_settings) dcn20_link_encoder_get_max_link_cap() argument [all...] |
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/link/hwss/ |
H A D | link_hwss_hpo_dp.h | 34 const struct dc_link_settings *link_settings, 37 const struct dc_link_settings *link_settings, 46 const struct dc_link_settings *link_settings);
|
H A D | link_hwss_hpo_dp.c | 45 const struct dc_link_settings *link_settings, in set_hpo_dp_hblank_min_symbol_width() 54 pipe_ctx->stream->link, link_settings); in set_hpo_dp_hblank_min_symbol_width() 109 const struct dc_link_settings *link_settings) in enable_hpo_dp_link_output() 118 link_settings, in enable_hpo_dp_link_output() 148 const struct dc_link_settings *link_settings, in set_hpo_dp_lane_settings() 153 link_settings, in set_hpo_dp_lane_settings() 44 set_hpo_dp_hblank_min_symbol_width(struct pipe_ctx *pipe_ctx, const struct dc_link_settings *link_settings, struct fixed31_32 throttled_vcp_size) set_hpo_dp_hblank_min_symbol_width() argument 105 enable_hpo_dp_link_output(struct dc_link *link, const struct link_resource *link_res, enum signal_type signal, enum clock_source_id clock_source, const struct dc_link_settings *link_settings) enable_hpo_dp_link_output() argument 146 set_hpo_dp_lane_settings(struct dc_link *link, const struct link_resource *link_res, const struct dc_link_settings *link_settings, const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) set_hpo_dp_lane_settings() argument
|
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn10/ |
H A D | dcn10_link_encoder.c | 488 const struct dc_link_settings *link_settings) in enc1_configure_encoder() 492 DP_UDI_LANES, link_settings->lane_count - LANE_COUNT_ONE); in enc1_configure_encoder() 973 const struct dc_link_settings *link_settings, in dcn10_link_encoder_enable_dp_output() 986 enc1_configure_encoder(enc10, link_settings); in dcn10_link_encoder_enable_dp_output() 993 cntl.lanes_number = link_settings->lane_count; in dcn10_link_encoder_enable_dp_output() 995 cntl.pixel_clock = link_settings->link_rate in dcn10_link_encoder_enable_dp_output() 1012 const struct dc_link_settings *link_settings, in dcn10_link_encoder_enable_dp_mst_output() 1025 enc1_configure_encoder(enc10, link_settings); in dcn10_link_encoder_enable_dp_mst_output() 1032 cntl.lanes_number = link_settings->lane_count; in dcn10_link_encoder_enable_dp_mst_output() 1034 cntl.pixel_clock = link_settings in dcn10_link_encoder_enable_dp_mst_output() 486 enc1_configure_encoder( struct dcn10_link_encoder *enc10, const struct dc_link_settings *link_settings) enc1_configure_encoder() argument 971 dcn10_link_encoder_enable_dp_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dcn10_link_encoder_enable_dp_output() argument 1010 dcn10_link_encoder_enable_dp_mst_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dcn10_link_encoder_enable_dp_mst_output() argument 1098 dcn10_link_encoder_dp_set_lane_settings( struct link_encoder *enc, const struct dc_link_settings *link_settings, const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) dcn10_link_encoder_dp_set_lane_settings() argument 1445 dcn10_link_encoder_get_max_link_cap(struct link_encoder *enc, struct dc_link_settings *link_settings) dcn10_link_encoder_get_max_link_cap() argument [all...] |
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/ |
H A D | dcn32_dio_link_encoder.c | 111 const struct dc_link_settings *link_settings, in dcn32_link_encoder_enable_dp_output() 115 dcn10_link_encoder_enable_dp_output(enc, link_settings, clock_source); in dcn32_link_encoder_enable_dp_output() 136 struct dc_link_settings *link_settings) in dcn32_link_encoder_get_max_link_cap() 141 dcn10_link_encoder_get_max_link_cap(enc, link_settings); in dcn32_link_encoder_get_max_link_cap() 147 link_settings->lane_count = MIN(LANE_COUNT_TWO, link_settings->lane_count); in dcn32_link_encoder_get_max_link_cap() 109 dcn32_link_encoder_enable_dp_output( struct link_encoder *enc, const struct dc_link_settings *link_settings, enum clock_source_id clock_source) dcn32_link_encoder_enable_dp_output() argument 135 dcn32_link_encoder_get_max_link_cap(struct link_encoder *enc, struct dc_link_settings *link_settings) dcn32_link_encoder_get_max_link_cap() argument
|
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/hw/ |
H A D | link_encoder.h | 121 const struct dc_link_settings *link_settings, 124 const struct dc_link_settings *link_settings, 132 const struct dc_link_settings *link_settings, 162 struct dc_link_settings *link_settings); 239 const struct dc_link_settings *link_settings, 275 const struct dc_link_settings *link_settings,
|
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/ |
H A D | link_hwss.h | 50 const struct dc_link_settings *link_settings, 58 const struct dc_link_settings *link_settings); 64 const struct dc_link_settings *link_settings,
|
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/hw/ |
H A D | link_encoder.h | 143 const struct dc_link_settings *link_settings, 146 const struct dc_link_settings *link_settings, 154 const struct link_training_settings *link_settings); 183 struct dc_link_settings *link_settings);
|
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn201/ |
H A D | dcn201_link_encoder.c | 53 struct dc_link_settings *link_settings) in dcn201_link_encoder_get_max_link_cap() 58 dcn10_link_encoder_get_max_link_cap(enc, link_settings); in dcn201_link_encoder_get_max_link_cap() 63 if (!value1 && !value2 && link_settings->lane_count > LANE_COUNT_TWO) in dcn201_link_encoder_get_max_link_cap() 64 link_settings->lane_count = LANE_COUNT_TWO; in dcn201_link_encoder_get_max_link_cap() 52 dcn201_link_encoder_get_max_link_cap(struct link_encoder *enc, struct dc_link_settings *link_settings) dcn201_link_encoder_get_max_link_cap() argument
|