| /kernel/linux/linux-5.10/drivers/mfd/ |
| H A D | ezx-pcap.c | 180 u32 msr, isr, int_sel, service; in pcap_isr_work() local
189 ezx_pcap_read(pcap, PCAP_REG_INT_SEL, &int_sel); in pcap_isr_work()
190 isr &= ~int_sel; in pcap_isr_work()
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| /kernel/linux/linux-6.6/drivers/mfd/ |
| H A D | ezx-pcap.c | 180 u32 msr, isr, int_sel, service; in pcap_isr_work() local
189 ezx_pcap_read(pcap, PCAP_REG_INT_SEL, &int_sel); in pcap_isr_work()
190 isr &= ~int_sel; in pcap_isr_work()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdkfd/ |
| H A D | kfd_pm4_headers_diq.h | 148 enum _RELEASE_MEM_int_sel_enum int_sel:3; member
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| H A D | kfd_pm4_headers_vi.h | 474 enum RELEASE_MEM_int_sel_enum int_sel:3; member
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| H A D | kfd_pm4_headers_ai.h | 534 enum mec_release_mem_int_sel_enum int_sel:3; member
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| H A D | kfd_packet_manager_vi.c | 308 packet->bitfields3.int_sel = in pm_release_mem_vi()
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| H A D | kfd_dbgdev.c | 146 rm_packet->bitfields3.int_sel = in dbgdev_diq_submit_ib()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdkfd/ |
| H A D | kfd_pm4_headers_vi.h | 475 enum RELEASE_MEM_int_sel_enum int_sel:3; member
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| H A D | kfd_pm4_headers_ai.h | 539 enum mec_release_mem_int_sel_enum int_sel:3; member
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| H A D | kfd_packet_manager_vi.c | 289 packet->bitfields3.int_sel = in pm_release_mem_vi()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v7_0.c | 2184 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v7_0_ring_emit_fence_gfx() local
2207 DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v7_0_ring_emit_fence_gfx()
2226 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v7_0_ring_emit_fence_compute() local
2234 amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v7_0_ring_emit_fence_compute()
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| H A D | gfx_v6_0.c | 1838 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v6_0_ring_emit_fence() local
1857 ((int_sel ? 2 : 0) << CP_EOP_DONE_DATA_CNTL__INT_SEL__SHIFT)); in gfx_v6_0_ring_emit_fence()
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| H A D | gfx_v8_0.c | 6183 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v8_0_ring_emit_fence_gfx() local
6210 DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v8_0_ring_emit_fence_gfx()
6278 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v8_0_ring_emit_fence_compute() local
6287 amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v8_0_ring_emit_fence_compute()
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| H A D | gfx_v9_0.c | 5345 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v9_0_ring_emit_fence() local
5358 amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v9_0_ring_emit_fence()
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| H A D | gfx_v10_0.c | 7865 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v10_0_ring_emit_fence() local
7877 PACKET3_RELEASE_MEM_INT_SEL(int_sel ? 2 : 0))); in gfx_v10_0_ring_emit_fence()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v7_0.c | 2119 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v7_0_ring_emit_fence_gfx() local
2142 DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v7_0_ring_emit_fence_gfx()
2163 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v7_0_ring_emit_fence_compute() local
2171 amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v7_0_ring_emit_fence_compute()
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| H A D | gfx_v6_0.c | 1808 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v6_0_ring_emit_fence() local
1827 ((int_sel ? 2 : 0) << CP_EOP_DONE_DATA_CNTL__INT_SEL__SHIFT)); in gfx_v6_0_ring_emit_fence()
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| H A D | gfx_v8_0.c | 6155 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v8_0_ring_emit_fence_gfx() local
6182 DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v8_0_ring_emit_fence_gfx()
6250 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v8_0_ring_emit_fence_compute() local
6259 amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v8_0_ring_emit_fence_compute()
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| H A D | gfx_v9_4_3.c | 2546 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v9_4_3_ring_emit_fence() local
2559 amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v9_4_3_ring_emit_fence()
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| H A D | gfx_v9_0.c | 5291 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v9_0_ring_emit_fence() local
5311 amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0)); in gfx_v9_0_ring_emit_fence()
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| H A D | gfx_v11_0.c | 5369 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v11_0_ring_emit_fence() local
5385 PACKET3_RELEASE_MEM_INT_SEL(int_sel ? 2 : 0))); in gfx_v11_0_ring_emit_fence()
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| H A D | gfx_v10_0.c | 8374 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v10_0_ring_emit_fence() local
8386 PACKET3_RELEASE_MEM_INT_SEL(int_sel ? 2 : 0))); in gfx_v10_0_ring_emit_fence()
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