H A D | df_v3_6.c | 413 uint32_t *hi_base_addr) in df_v3_6_pmc_get_addr() 424 *hi_base_addr = is_ctrl ? smnPerfMonCtlHi4 : smnPerfMonCtrHi4; in df_v3_6_pmc_get_addr() 428 *hi_base_addr = is_ctrl ? smnPerfMonCtlHi5 : smnPerfMonCtrHi5; in df_v3_6_pmc_get_addr() 432 *hi_base_addr = is_ctrl ? smnPerfMonCtlHi6 : smnPerfMonCtrHi6; in df_v3_6_pmc_get_addr() 436 *hi_base_addr = is_ctrl ? smnPerfMonCtlHi7 : smnPerfMonCtrHi7; in df_v3_6_pmc_get_addr() 447 uint32_t *hi_base_addr) in df_v3_6_pmc_get_read_settings() 449 df_v3_6_pmc_get_addr(adev, config, 0, lo_base_addr, hi_base_addr); in df_v3_6_pmc_get_read_settings() 456 uint32_t *hi_base_addr, in df_v3_6_pmc_get_ctrl_settings() 465 df_v3_6_pmc_get_addr(adev, config, 1, lo_base_addr, hi_base_addr); in df_v3_6_pmc_get_ctrl_settings() 467 if ((*lo_base_addr == 0) || (*hi_base_addr in df_v3_6_pmc_get_ctrl_settings() 409 df_v3_6_pmc_get_addr(struct amdgpu_device *adev, uint64_t config, int is_ctrl, uint32_t *lo_base_addr, uint32_t *hi_base_addr) df_v3_6_pmc_get_addr() argument 444 df_v3_6_pmc_get_read_settings(struct amdgpu_device *adev, uint64_t config, uint32_t *lo_base_addr, uint32_t *hi_base_addr) df_v3_6_pmc_get_read_settings() argument 453 df_v3_6_pmc_get_ctrl_settings(struct amdgpu_device *adev, uint64_t config, uint32_t *lo_base_addr, uint32_t *hi_base_addr, uint32_t *lo_val, uint32_t *hi_val, bool is_enable) df_v3_6_pmc_get_ctrl_settings() argument 565 uint32_t lo_base_addr = 0, hi_base_addr = 0; df_v3_6_reset_perfmon_cntr() local 579 uint32_t lo_base_addr, hi_base_addr, lo_val, hi_val; df_v3_6_pmc_start() local 620 uint32_t lo_base_addr, hi_base_addr, lo_val, hi_val; df_v3_6_pmc_stop() local 654 uint32_t lo_base_addr = 0, hi_base_addr = 0, lo_val = 0, hi_val = 0; df_v3_6_pmc_get_count() local [all...] |