gfx_v9_0_edc_counter_regs (reference) in projects: kernel - OpenGrok search results

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Searched refs:gfx_v9_0_edc_counter_regs (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A D	gfx_v9_0.c	4425 static const struct soc15_reg_entry gfx_v9_0_edc_counter_regs[] = { variable 6611 for (i = 0; i < ARRAY_SIZE(gfx_v9_0_edc_counter_regs); i++) { in gfx_v9_0_reset_ras_error_count() 6612 for (j = 0; j < gfx_v9_0_edc_counter_regs[i].se_num; j++) { in gfx_v9_0_reset_ras_error_count() 6613 for (k = 0; k < gfx_v9_0_edc_counter_regs[i].instance; k++) { in gfx_v9_0_reset_ras_error_count() 6615 RREG32(SOC15_REG_ENTRY_OFFSET(gfx_v9_0_edc_counter_regs[i])); in gfx_v9_0_reset_ras_error_count() 6673 for (i = 0; i < ARRAY_SIZE(gfx_v9_0_edc_counter_regs); i++) { in gfx_v9_0_query_ras_error_count() 6674 for (j = 0; j < gfx_v9_0_edc_counter_regs[i].se_num; j++) { in gfx_v9_0_query_ras_error_count() 6675 for (k = 0; k < gfx_v9_0_edc_counter_regs[i].instance; k++) { in gfx_v9_0_query_ras_error_count() 6678 RREG32(SOC15_REG_ENTRY_OFFSET(gfx_v9_0_edc_counter_regs[i])); in gfx_v9_0_query_ras_error_count() 6681 &gfx_v9_0_edc_counter_regs[ in gfx_v9_0_query_ras_error_count() [all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A D	gfx_v9_0.c	4259 static const struct soc15_reg_entry gfx_v9_0_edc_counter_regs[] = { variable 6684 for (i = 0; i < ARRAY_SIZE(gfx_v9_0_edc_counter_regs); i++) { in gfx_v9_0_reset_ras_error_count() 6685 for (j = 0; j < gfx_v9_0_edc_counter_regs[i].se_num; j++) { in gfx_v9_0_reset_ras_error_count() 6686 for (k = 0; k < gfx_v9_0_edc_counter_regs[i].instance; k++) { in gfx_v9_0_reset_ras_error_count() 6688 RREG32(SOC15_REG_ENTRY_OFFSET(gfx_v9_0_edc_counter_regs[i])); in gfx_v9_0_reset_ras_error_count() 6746 for (i = 0; i < ARRAY_SIZE(gfx_v9_0_edc_counter_regs); i++) { in gfx_v9_0_query_ras_error_count() 6747 for (j = 0; j < gfx_v9_0_edc_counter_regs[i].se_num; j++) { in gfx_v9_0_query_ras_error_count() 6748 for (k = 0; k < gfx_v9_0_edc_counter_regs[i].instance; k++) { in gfx_v9_0_query_ras_error_count() 6751 RREG32(SOC15_REG_ENTRY_OFFSET(gfx_v9_0_edc_counter_regs[i])); in gfx_v9_0_query_ras_error_count() 6754 &gfx_v9_0_edc_counter_regs[ in gfx_v9_0_query_ras_error_count() [all...]

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