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Searched refs:gate (Results 1 - 25 of 368) sorted by relevance

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/kernel/linux/linux-5.10/drivers/clk/tegra/
H A Dclk-periph-gate.c18 /* Macros to assist peripheral gate clock */
19 #define read_enb(gate) \
20 readl_relaxed(gate->clk_base + (gate->regs->enb_reg))
21 #define write_enb_set(val, gate) \
22 writel_relaxed(val, gate->clk_base + (gate->regs->enb_set_reg))
23 #define write_enb_clr(val, gate) \
24 writel_relaxed(val, gate->clk_base + (gate
38 struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw); clk_periph_is_enabled() local
53 struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw); clk_periph_enable_locked() local
55 write_enb_set(periph_clk_to_bit(gate), gate); clk_periph_enable_locked() local
62 write_rst_clr(periph_clk_to_bit(gate), gate); clk_periph_enable_locked() local
76 struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw); clk_periph_disable_locked() local
86 write_enb_clr(periph_clk_to_bit(gate), gate); clk_periph_disable_locked() local
91 struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw); clk_periph_enable() local
106 struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw); clk_periph_disable() local
121 struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw); clk_periph_disable_unused() local
148 struct tegra_clk_periph_gate *gate; tegra_clk_register_periph_gate() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/tegra/
H A Dclk-periph-gate.c18 /* Macros to assist peripheral gate clock */
19 #define read_enb(gate) \
20 readl_relaxed(gate->clk_base + (gate->regs->enb_reg))
21 #define write_enb_set(val, gate) \
22 writel_relaxed(val, gate->clk_base + (gate->regs->enb_set_reg))
23 #define write_enb_clr(val, gate) \
24 writel_relaxed(val, gate->clk_base + (gate
38 struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw); clk_periph_is_enabled() local
53 struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw); clk_periph_enable_locked() local
55 write_enb_set(periph_clk_to_bit(gate), gate); clk_periph_enable_locked() local
68 struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw); clk_periph_disable_locked() local
78 write_enb_clr(periph_clk_to_bit(gate), gate); clk_periph_disable_locked() local
83 struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw); clk_periph_enable() local
98 struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw); clk_periph_disable() local
113 struct tegra_clk_periph_gate *gate = to_clk_periph_gate(hw); clk_periph_disable_unused() local
140 struct tegra_clk_periph_gate *gate; tegra_clk_register_periph_gate() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/mmp/
H A Dclk-gate.c2 * mmp gate clock operation source file
29 struct mmp_clk_gate *gate = to_clk_mmp_gate(hw); in mmp_clk_gate_enable() local
34 if (gate->lock) in mmp_clk_gate_enable()
35 spin_lock_irqsave(gate->lock, flags); in mmp_clk_gate_enable()
37 tmp = readl(gate->reg); in mmp_clk_gate_enable()
38 tmp &= ~gate->mask; in mmp_clk_gate_enable()
39 tmp |= gate->val_enable; in mmp_clk_gate_enable()
40 writel(tmp, gate->reg); in mmp_clk_gate_enable()
42 if (gate->lock) in mmp_clk_gate_enable()
43 spin_unlock_irqrestore(gate in mmp_clk_gate_enable()
56 struct mmp_clk_gate *gate = to_clk_mmp_gate(hw); mmp_clk_gate_disable() local
74 struct mmp_clk_gate *gate = to_clk_mmp_gate(hw); mmp_clk_gate_is_enabled() local
100 struct mmp_clk_gate *gate; mmp_clk_register_gate() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/mmp/
H A Dclk-gate.c3 * mmp gate clock operation source file
26 struct mmp_clk_gate *gate = to_clk_mmp_gate(hw); in mmp_clk_gate_enable() local
31 if (gate->lock) in mmp_clk_gate_enable()
32 spin_lock_irqsave(gate->lock, flags); in mmp_clk_gate_enable()
34 tmp = readl(gate->reg); in mmp_clk_gate_enable()
35 tmp &= ~gate->mask; in mmp_clk_gate_enable()
36 tmp |= gate->val_enable; in mmp_clk_gate_enable()
37 writel(tmp, gate->reg); in mmp_clk_gate_enable()
39 if (gate->lock) in mmp_clk_gate_enable()
40 spin_unlock_irqrestore(gate in mmp_clk_gate_enable()
53 struct mmp_clk_gate *gate = to_clk_mmp_gate(hw); mmp_clk_gate_disable() local
71 struct mmp_clk_gate *gate = to_clk_mmp_gate(hw); mmp_clk_gate_is_enabled() local
97 struct mmp_clk_gate *gate; mmp_clk_register_gate() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/imx/
H A Dclk-gate2.c19 * DOC: basic gateable clock which can gate and ungate its output
42 struct clk_gate2 *gate = to_clk_gate2(hw); in clk_gate2_enable() local
47 spin_lock_irqsave(gate->lock, flags); in clk_gate2_enable()
49 if (gate->share_count && (*gate->share_count)++ > 0) in clk_gate2_enable()
52 if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) { in clk_gate2_enable()
55 reg = readl(gate->reg); in clk_gate2_enable()
56 reg &= ~(3 << gate->bit_idx); in clk_gate2_enable()
57 reg |= gate->cgr_val << gate in clk_gate2_enable()
69 struct clk_gate2 *gate = to_clk_gate2(hw); clk_gate2_disable() local
106 struct clk_gate2 *gate = to_clk_gate2(hw); clk_gate2_is_enabled() local
116 struct clk_gate2 *gate = to_clk_gate2(hw); clk_gate2_disable_unused() local
147 struct clk_gate2 *gate; clk_hw_register_gate2() local
[all...]
H A Dclk-gate-exclusive.c13 * struct clk_gate_exclusive - i.MX specific gate clock which is mutually
14 * exclusive with other gate clocks
16 * @gate: the parent class
17 * @exclusive_mask: mask of gate bits which are mutually exclusive to this
18 * gate clock
20 * The imx exclusive gate clock is a subclass of basic clk_gate
21 * with an addtional mask to indicate which other gate bits in the same
22 * register is mutually exclusive to this gate clock.
25 struct clk_gate gate; member
31 struct clk_gate *gate in clk_gate_exclusive_enable() local
62 struct clk_gate *gate; imx_clk_hw_gate_exclusive() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/imx/
H A Dclk-gate2.c19 * DOC: basic gateable clock which can gate and ungate its output
43 struct clk_gate2 *gate = to_clk_gate2(hw); in clk_gate2_do_shared_clks() local
46 reg = readl(gate->reg); in clk_gate2_do_shared_clks()
47 reg &= ~(gate->cgr_mask << gate->bit_idx); in clk_gate2_do_shared_clks()
49 reg |= (gate->cgr_val & gate->cgr_mask) << gate->bit_idx; in clk_gate2_do_shared_clks()
50 writel(reg, gate->reg); in clk_gate2_do_shared_clks()
55 struct clk_gate2 *gate in clk_gate2_enable() local
72 struct clk_gate2 *gate = to_clk_gate2(hw); clk_gate2_disable() local
102 struct clk_gate2 *gate = to_clk_gate2(hw); clk_gate2_is_enabled() local
118 struct clk_gate2 *gate = to_clk_gate2(hw); clk_gate2_disable_unused() local
142 struct clk_gate2 *gate; clk_hw_register_gate2() local
[all...]
H A Dclk-gate-93.c49 struct imx93_clk_gate *gate = to_imx93_clk_gate(hw); in imx93_clk_gate_do_hardware() local
52 val = readl(gate->reg + AUTHEN_OFFSET); in imx93_clk_gate_do_hardware()
55 writel(val, gate->reg + LPM_CUR_OFFSET); in imx93_clk_gate_do_hardware()
57 val = readl(gate->reg + DIRECT_OFFSET); in imx93_clk_gate_do_hardware()
58 val &= ~(gate->mask << gate->bit_idx); in imx93_clk_gate_do_hardware()
60 val |= (gate->val & gate->mask) << gate->bit_idx; in imx93_clk_gate_do_hardware()
61 writel(val, gate in imx93_clk_gate_do_hardware()
67 struct imx93_clk_gate *gate = to_imx93_clk_gate(hw); imx93_clk_gate_enable() local
84 struct imx93_clk_gate *gate = to_imx93_clk_gate(hw); imx93_clk_gate_disable() local
101 imx93_clk_gate_reg_is_enabled(struct imx93_clk_gate *gate) imx93_clk_gate_reg_is_enabled() argument
120 struct imx93_clk_gate *gate = to_imx93_clk_gate(hw); imx93_clk_gate_is_enabled() local
135 struct imx93_clk_gate *gate = to_imx93_clk_gate(hw); imx93_clk_gate_disable_unused() local
161 struct imx93_clk_gate *gate; imx93_clk_gate() local
[all...]
H A Dclk-gate-exclusive.c13 * struct clk_gate_exclusive - i.MX specific gate clock which is mutually
14 * exclusive with other gate clocks
16 * @gate: the parent class
17 * @exclusive_mask: mask of gate bits which are mutually exclusive to this
18 * gate clock
20 * The imx exclusive gate clock is a subclass of basic clk_gate
21 * with an addtional mask to indicate which other gate bits in the same
22 * register is mutually exclusive to this gate clock.
25 struct clk_gate gate; member
31 struct clk_gate *gate in clk_gate_exclusive_enable() local
62 struct clk_gate *gate; imx_clk_hw_gate_exclusive() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/
H A Dclk-gate.c17 * DOC: basic gatable clock which can gate and ungate it's ouput
26 static inline u32 clk_gate_readl(struct clk_gate *gate) in clk_gate_readl() argument
28 if (gate->flags & CLK_GATE_BIG_ENDIAN) in clk_gate_readl()
29 return ioread32be(gate->reg); in clk_gate_readl()
31 return readl(gate->reg); in clk_gate_readl()
34 static inline void clk_gate_writel(struct clk_gate *gate, u32 val) in clk_gate_writel() argument
36 if (gate->flags & CLK_GATE_BIG_ENDIAN) in clk_gate_writel()
37 iowrite32be(val, gate->reg); in clk_gate_writel()
39 writel(val, gate->reg); in clk_gate_writel()
57 struct clk_gate *gate in clk_gate_endisable() local
105 struct clk_gate *gate = to_clk_gate(hw); clk_gate_is_enabled() local
134 struct clk_gate *gate; __clk_hw_register_gate() local
201 struct clk_gate *gate; clk_unregister_gate() local
217 struct clk_gate *gate; clk_hw_unregister_gate() local
[all...]
H A Dclk-ast2600.c65 [ASPEED_CLK_GATE_MCLK] = { 0, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */
66 [ASPEED_CLK_GATE_ECLK] = { 1, 6, "eclk-gate", "eclk", 0 }, /* Video Engine */
67 [ASPEED_CLK_GATE_GCLK] = { 2, 7, "gclk-gate", NULL, 0 }, /* 2D engine */
69 [ASPEED_CLK_GATE_VCLK] = { 3, -1, "vclk-gate", NULL, 0 }, /* Video Capture */
70 [ASPEED_CLK_GATE_BCLK] = { 4, 8, "bclk-gate", "bclk", 0 }, /* PCIe/PCI */
72 [ASPEED_CLK_GATE_DCLK] = { 5, -1, "dclk-gate", NULL, CLK_IS_CRITICAL }, /* DAC */
73 [ASPEED_CLK_GATE_REF0CLK] = { 6, -1, "ref0clk-gate", "clkin", CLK_IS_CRITICAL },
74 [ASPEED_CLK_GATE_USBPORT2CLK] = { 7, 3, "usb-port2-gate", NULL, 0 }, /* USB2.0 Host port 2 */
76 [ASPEED_CLK_GATE_USBUHCICLK] = { 9, 15, "usb-uhci-gate", NULL, 0 }, /* USB1.1 (requires port 2 enabled) */
78 [ASPEED_CLK_GATE_D1CLK] = { 10, 13, "d1clk-gate", "d1cl
233 get_reset_reg(struct aspeed_clk_gate *gate) get_reset_reg() argument
241 get_clock_reg(struct aspeed_clk_gate *gate) get_clock_reg() argument
251 struct aspeed_clk_gate *gate = to_aspeed_clk_gate(hw); aspeed_g6_clk_is_enabled() local
279 struct aspeed_clk_gate *gate = to_aspeed_clk_gate(hw); aspeed_g6_clk_enable() local
321 struct aspeed_clk_gate *gate = to_aspeed_clk_gate(hw); aspeed_g6_clk_disable() local
391 struct aspeed_clk_gate *gate; aspeed_g6_clk_hw_register_gate() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/
H A Dclk-gate.c18 * DOC: basic gatable clock which can gate and ungate it's ouput
27 static inline u32 clk_gate_readl(struct clk_gate *gate) in clk_gate_readl() argument
29 if (gate->flags & CLK_GATE_BIG_ENDIAN) in clk_gate_readl()
30 return ioread32be(gate->reg); in clk_gate_readl()
32 return readl(gate->reg); in clk_gate_readl()
35 static inline void clk_gate_writel(struct clk_gate *gate, u32 val) in clk_gate_writel() argument
37 if (gate->flags & CLK_GATE_BIG_ENDIAN) in clk_gate_writel()
38 iowrite32be(val, gate->reg); in clk_gate_writel()
40 writel(val, gate->reg); in clk_gate_writel()
58 struct clk_gate *gate in clk_gate_endisable() local
106 struct clk_gate *gate = to_clk_gate(hw); clk_gate_is_enabled() local
135 struct clk_gate *gate; __clk_hw_register_gate() local
202 struct clk_gate *gate; clk_unregister_gate() local
218 struct clk_gate *gate; clk_hw_unregister_gate() local
[all...]
H A Dclk-ast2600.c104 [ASPEED_CLK_GATE_MCLK] = { 0, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */
105 [ASPEED_CLK_GATE_ECLK] = { 1, 6, "eclk-gate", "eclk", 0 }, /* Video Engine */
106 [ASPEED_CLK_GATE_GCLK] = { 2, 7, "gclk-gate", NULL, 0 }, /* 2D engine */
108 [ASPEED_CLK_GATE_VCLK] = { 3, -1, "vclk-gate", NULL, 0 }, /* Video Capture */
109 [ASPEED_CLK_GATE_BCLK] = { 4, 8, "bclk-gate", "bclk", 0 }, /* PCIe/PCI */
111 [ASPEED_CLK_GATE_DCLK] = { 5, -1, "dclk-gate", NULL, CLK_IS_CRITICAL }, /* DAC */
112 [ASPEED_CLK_GATE_REF0CLK] = { 6, -1, "ref0clk-gate", "clkin", CLK_IS_CRITICAL },
113 [ASPEED_CLK_GATE_USBPORT2CLK] = { 7, 3, "usb-port2-gate", NULL, 0 }, /* USB2.0 Host port 2 */
115 [ASPEED_CLK_GATE_USBUHCICLK] = { 9, 15, "usb-uhci-gate", NULL, 0 }, /* USB1.1 (requires port 2 enabled) */
117 [ASPEED_CLK_GATE_D1CLK] = { 10, 13, "d1clk-gate", "d1cl
271 get_reset_reg(struct aspeed_clk_gate *gate) get_reset_reg() argument
279 get_clock_reg(struct aspeed_clk_gate *gate) get_clock_reg() argument
289 struct aspeed_clk_gate *gate = to_aspeed_clk_gate(hw); aspeed_g6_clk_is_enabled() local
317 struct aspeed_clk_gate *gate = to_aspeed_clk_gate(hw); aspeed_g6_clk_enable() local
359 struct aspeed_clk_gate *gate = to_aspeed_clk_gate(hw); aspeed_g6_clk_disable() local
429 struct aspeed_clk_gate *gate; aspeed_g6_clk_hw_register_gate() local
[all...]
/kernel/linux/linux-5.10/drivers/staging/sm750fb/
H A Dddk750_power.c75 void sm750_set_current_gate(unsigned int gate) in sm750_set_current_gate() argument
78 poke32(MODE1_GATE, gate); in sm750_set_current_gate()
80 poke32(MODE0_GATE, gate); in sm750_set_current_gate()
88 u32 gate; in sm750_enable_2d_engine() local
90 gate = peek32(CURRENT_GATE); in sm750_enable_2d_engine()
92 gate |= (CURRENT_GATE_DE | CURRENT_GATE_CSC); in sm750_enable_2d_engine()
94 gate &= ~(CURRENT_GATE_DE | CURRENT_GATE_CSC); in sm750_enable_2d_engine()
96 sm750_set_current_gate(gate); in sm750_enable_2d_engine()
101 u32 gate; in sm750_enable_dma() local
104 gate in sm750_enable_dma()
118 u32 gate; sm750_enable_gpio() local
135 u32 gate; sm750_enable_i2c() local
[all...]
/kernel/linux/linux-6.6/drivers/staging/sm750fb/
H A Dddk750_power.c75 void sm750_set_current_gate(unsigned int gate) in sm750_set_current_gate() argument
78 poke32(MODE1_GATE, gate); in sm750_set_current_gate()
80 poke32(MODE0_GATE, gate); in sm750_set_current_gate()
88 u32 gate; in sm750_enable_2d_engine() local
90 gate = peek32(CURRENT_GATE); in sm750_enable_2d_engine()
92 gate |= (CURRENT_GATE_DE | CURRENT_GATE_CSC); in sm750_enable_2d_engine()
94 gate &= ~(CURRENT_GATE_DE | CURRENT_GATE_CSC); in sm750_enable_2d_engine()
96 sm750_set_current_gate(gate); in sm750_enable_2d_engine()
101 u32 gate; in sm750_enable_dma() local
104 gate in sm750_enable_dma()
118 u32 gate; sm750_enable_gpio() local
135 u32 gate; sm750_enable_i2c() local
[all...]
/kernel/linux/linux-5.10/drivers/clk/uniphier/
H A Dclk-uniphier-gate.c25 struct uniphier_clk_gate *gate = to_uniphier_clk_gate(hw); in uniphier_clk_gate_endisable() local
27 return regmap_write_bits(gate->regmap, gate->reg, BIT(gate->bit), in uniphier_clk_gate_endisable()
28 enable ? BIT(gate->bit) : 0); in uniphier_clk_gate_endisable()
44 struct uniphier_clk_gate *gate = to_uniphier_clk_gate(hw); in uniphier_clk_gate_is_enabled() local
47 if (regmap_read(gate->regmap, gate->reg, &val) < 0) in uniphier_clk_gate_is_enabled()
50 return !!(val & BIT(gate->bit)); in uniphier_clk_gate_is_enabled()
64 struct uniphier_clk_gate *gate; in uniphier_clk_register_gate() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/uniphier/
H A Dclk-uniphier-gate.c25 struct uniphier_clk_gate *gate = to_uniphier_clk_gate(hw); in uniphier_clk_gate_endisable() local
27 return regmap_write_bits(gate->regmap, gate->reg, BIT(gate->bit), in uniphier_clk_gate_endisable()
28 enable ? BIT(gate->bit) : 0); in uniphier_clk_gate_endisable()
44 struct uniphier_clk_gate *gate = to_uniphier_clk_gate(hw); in uniphier_clk_gate_is_enabled() local
47 if (regmap_read(gate->regmap, gate->reg, &val) < 0) in uniphier_clk_gate_is_enabled()
50 return !!(val & BIT(gate->bit)); in uniphier_clk_gate_is_enabled()
64 struct uniphier_clk_gate *gate; in uniphier_clk_register_gate() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/visconti/
H A Dclkc.c30 struct visconti_clk_gate *gate = to_visconti_clk_gate(hw); in visconti_gate_clk_is_enabled() local
31 u32 clk = BIT(gate->ck_idx); in visconti_gate_clk_is_enabled()
34 regmap_read(gate->regmap, gate->ckon_offset, &val); in visconti_gate_clk_is_enabled()
40 struct visconti_clk_gate *gate = to_visconti_clk_gate(hw); in visconti_gate_clk_disable() local
41 u32 clk = BIT(gate->ck_idx); in visconti_gate_clk_disable()
44 spin_lock_irqsave(gate->lock, flags); in visconti_gate_clk_disable()
47 spin_unlock_irqrestore(gate->lock, flags); in visconti_gate_clk_disable()
51 regmap_update_bits(gate->regmap, gate in visconti_gate_clk_disable()
57 struct visconti_clk_gate *gate = to_visconti_clk_gate(hw); visconti_gate_clk_enable() local
84 struct visconti_clk_gate *gate; visconti_clk_register_gate() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/ingenic/
H A Djz4770-cgu.c178 .gate = { CGU_REG_CLKGR1, 7 },
195 .gate = { CGU_REG_OPCR, 31, true }, // disable CCLK stop on idle
213 .gate = { CGU_REG_MSC0CDR, 31 },
220 .gate = { CGU_REG_MSC1CDR, 31 },
227 .gate = { CGU_REG_MSC2CDR, 31 },
234 .gate = { CGU_REG_CLKGR0, 26 },
241 .gate = { CGU_REG_CLKGR0, 24 },
248 .gate = { CGU_REG_CLKGR1, 9 },
255 .gate = { CGU_REG_CLKGR0, 1 },
262 .gate
[all...]
H A Djz4780-cgu.c409 .gate = { CGU_REG_CLKGR1, 2 },
451 .gate = { CGU_REG_CLKGR0, 3 },
458 .gate = { CGU_REG_CLKGR0, 11 },
465 .gate = { CGU_REG_CLKGR0, 12 },
474 .gate = { CGU_REG_CLKGR0, 24 },
509 .gate = { CGU_REG_CLKGR1, 3 },
518 .gate = { CGU_REG_CLKGR1, 4 },
527 .gate = { CGU_REG_CLKGR1, 9 },
536 .gate = { CGU_REG_CLKGR0, 1 },
556 .gate
[all...]
H A Djz4755-cgu.c144 .gate = { CGU_REG_CLKGR, 10 },
151 .gate = { CGU_REG_CLKGR, 9 },
171 .gate = { CGU_REG_CLKGR, 4 },
178 .gate = { CGU_REG_CLKGR, 18 },
185 .gate = { CGU_REG_CLKGR, 2 },
192 .gate = { CGU_REG_CLKGR, 8 },
200 .gate = { CGU_REG_CLKGR, 0 },
206 .gate = { CGU_REG_CLKGR, 14 },
212 .gate = { CGU_REG_CLKGR, 15 },
218 .gate
[all...]
/kernel/linux/linux-5.10/drivers/clk/ingenic/
H A Djz4770-cgu.c174 .gate = { CGU_REG_CLKGR1, 7 },
191 .gate = { CGU_REG_OPCR, 31, true }, // disable CCLK stop on idle
209 .gate = { CGU_REG_MSC0CDR, 31 },
216 .gate = { CGU_REG_MSC1CDR, 31 },
223 .gate = { CGU_REG_MSC2CDR, 31 },
230 .gate = { CGU_REG_CLKGR0, 26 },
237 .gate = { CGU_REG_CLKGR0, 24 },
244 .gate = { CGU_REG_CLKGR1, 9 },
251 .gate = { CGU_REG_CLKGR0, 1 },
258 .gate
[all...]
H A Djz4780-cgu.c394 .gate = { CGU_REG_CLKGR1, 2 },
436 .gate = { CGU_REG_CLKGR0, 3 },
443 .gate = { CGU_REG_CLKGR0, 11 },
450 .gate = { CGU_REG_CLKGR0, 12 },
459 .gate = { CGU_REG_CLKGR0, 24 },
494 .gate = { CGU_REG_CLKGR1, 3 },
503 .gate = { CGU_REG_CLKGR1, 4 },
512 .gate = { CGU_REG_CLKGR1, 9 },
521 .gate = { CGU_REG_CLKGR0, 1 },
541 .gate
[all...]
/kernel/linux/linux-5.10/drivers/clk/bcm/
H A Dclk-kona.c358 __is_clk_gate_enabled(struct ccu_data *ccu, struct bcm_clk_gate *gate) in __is_clk_gate_enabled() argument
363 /* If there is no gate we can assume it's enabled. */ in __is_clk_gate_enabled()
364 if (!gate_exists(gate)) in __is_clk_gate_enabled()
367 bit_mask = 1 << gate->status_bit; in __is_clk_gate_enabled()
368 reg_val = __ccu_read(ccu, gate->offset); in __is_clk_gate_enabled()
375 is_clk_gate_enabled(struct ccu_data *ccu, struct bcm_clk_gate *gate) in is_clk_gate_enabled() argument
381 if (!gate_exists(gate)) in is_clk_gate_enabled()
385 ret = __is_clk_gate_enabled(ccu, gate); in is_clk_gate_enabled()
392 * Commit our desired gate state to the hardware.
396 __gate_commit(struct ccu_data *ccu, struct bcm_clk_gate *gate) in __gate_commit() argument
447 gate_init(struct ccu_data *ccu, struct bcm_clk_gate *gate) gate_init() argument
461 __clk_gate(struct ccu_data *ccu, struct bcm_clk_gate *gate, bool enable) __clk_gate() argument
486 clk_gate(struct ccu_data *ccu, const char *name, struct bcm_clk_gate *gate, bool enable) clk_gate() argument
591 __div_commit(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_div *div, struct bcm_clk_trig *trig) __div_commit() argument
647 div_init(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_div *div, struct bcm_clk_trig *trig) div_init() argument
655 divider_write(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_div *div, struct bcm_clk_trig *trig, u64 scaled_div) divider_write() argument
874 __sel_commit(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_sel *sel, struct bcm_clk_trig *trig) __sel_commit() argument
931 sel_init(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_sel *sel, struct bcm_clk_trig *trig) sel_init() argument
944 selector_write(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_sel *sel, struct bcm_clk_trig *trig, u8 index) selector_write() argument
977 struct bcm_clk_gate *gate = &bcm_clk->u.peri->gate; kona_peri_clk_enable() local
985 struct bcm_clk_gate *gate = &bcm_clk->u.peri->gate; kona_peri_clk_disable() local
993 struct bcm_clk_gate *gate = &bcm_clk->u.peri->gate; kona_peri_clk_is_enabled() local
[all...]
/kernel/linux/linux-6.6/drivers/clk/bcm/
H A Dclk-kona.c350 __is_clk_gate_enabled(struct ccu_data *ccu, struct bcm_clk_gate *gate) in __is_clk_gate_enabled() argument
355 /* If there is no gate we can assume it's enabled. */ in __is_clk_gate_enabled()
356 if (!gate_exists(gate)) in __is_clk_gate_enabled()
359 bit_mask = 1 << gate->status_bit; in __is_clk_gate_enabled()
360 reg_val = __ccu_read(ccu, gate->offset); in __is_clk_gate_enabled()
367 is_clk_gate_enabled(struct ccu_data *ccu, struct bcm_clk_gate *gate) in is_clk_gate_enabled() argument
373 if (!gate_exists(gate)) in is_clk_gate_enabled()
377 ret = __is_clk_gate_enabled(ccu, gate); in is_clk_gate_enabled()
384 * Commit our desired gate state to the hardware.
388 __gate_commit(struct ccu_data *ccu, struct bcm_clk_gate *gate) in __gate_commit() argument
439 gate_init(struct ccu_data *ccu, struct bcm_clk_gate *gate) gate_init() argument
453 __clk_gate(struct ccu_data *ccu, struct bcm_clk_gate *gate, bool enable) __clk_gate() argument
478 clk_gate(struct ccu_data *ccu, const char *name, struct bcm_clk_gate *gate, bool enable) clk_gate() argument
583 __div_commit(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_div *div, struct bcm_clk_trig *trig) __div_commit() argument
639 div_init(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_div *div, struct bcm_clk_trig *trig) div_init() argument
647 divider_write(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_div *div, struct bcm_clk_trig *trig, u64 scaled_div) divider_write() argument
866 __sel_commit(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_sel *sel, struct bcm_clk_trig *trig) __sel_commit() argument
923 sel_init(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_sel *sel, struct bcm_clk_trig *trig) sel_init() argument
936 selector_write(struct ccu_data *ccu, struct bcm_clk_gate *gate, struct bcm_clk_sel *sel, struct bcm_clk_trig *trig, u8 index) selector_write() argument
969 struct bcm_clk_gate *gate = &bcm_clk->u.peri->gate; kona_peri_clk_enable() local
977 struct bcm_clk_gate *gate = &bcm_clk->u.peri->gate; kona_peri_clk_disable() local
985 struct bcm_clk_gate *gate = &bcm_clk->u.peri->gate; kona_peri_clk_is_enabled() local
[all...]

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