entryLo0 (reference) in projects: kernel - OpenGrok search results

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Searched refs:entryLo0 (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/arch/mips/pci/
H A D	pci-alchemy.c	`105 unsigned long offset, status, cfg_base, flags, entryLo0, entryLo1, r; in config_access() local 145 entryLo0 = (6 << 26) \| (cfg_base >> 6) \| (2 << 3) \| 7; in config_access() 147 if ((entryLo0 != ctx->last_elo0) \|\| (entryLo1 != ctx->last_elo1)) { in config_access() 148 mod_wired_entry(ctx->wired_entry, entryLo0, entryLo1, in config_access() 150 ctx->last_elo0 = entryLo0; in config_access()`
/kernel/linux/linux-6.6/arch/mips/pci/
H A D	pci-alchemy.c	`105 unsigned long offset, status, cfg_base, flags, entryLo0, entryLo1, r; in config_access() local 145 entryLo0 = (6 << 26) \| (cfg_base >> 6) \| (2 << 3) \| 7; in config_access() 147 if ((entryLo0 != ctx->last_elo0) \|\| (entryLo1 != ctx->last_elo1)) { in config_access() 148 mod_wired_entry(ctx->wired_entry, entryLo0, entryLo1, in config_access() 150 ctx->last_elo0 = entryLo0; in config_access()`

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