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Searched refs:enable_val (Results 1 - 25 of 58) sorted by relevance

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/kernel/linux/linux-5.10/drivers/phy/samsung/
H A Dphy-exynos-mipi-video.c46 u32 enable_val; member
63 .enable_val = EXYNOS4_PHY_ENABLE,
72 .enable_val = EXYNOS4_PHY_ENABLE,
81 .enable_val = EXYNOS4_PHY_ENABLE,
90 .enable_val = EXYNOS4_PHY_ENABLE,
108 .enable_val = EXYNOS4_PHY_ENABLE,
117 .enable_val = EXYNOS4_PHY_ENABLE,
126 .enable_val = EXYNOS4_PHY_ENABLE,
135 .enable_val = EXYNOS4_PHY_ENABLE,
144 .enable_val
[all...]
/kernel/linux/linux-6.6/drivers/phy/samsung/
H A Dphy-exynos-mipi-video.c45 u32 enable_val; member
62 .enable_val = EXYNOS4_PHY_ENABLE,
71 .enable_val = EXYNOS4_PHY_ENABLE,
80 .enable_val = EXYNOS4_PHY_ENABLE,
89 .enable_val = EXYNOS4_PHY_ENABLE,
107 .enable_val = EXYNOS4_PHY_ENABLE,
116 .enable_val = EXYNOS4_PHY_ENABLE,
125 .enable_val = EXYNOS4_PHY_ENABLE,
134 .enable_val = EXYNOS4_PHY_ENABLE,
143 .enable_val
[all...]
/kernel/linux/linux-6.6/drivers/clk/
H A Dclk-gate_test.c165 u32 enable_val = BIT(5); in clk_gate_test_enable() local
169 KUNIT_EXPECT_EQ(test, enable_val, ctx->fake_reg); in clk_gate_test_enable()
182 u32 enable_val = BIT(5); in clk_gate_test_disable() local
186 KUNIT_ASSERT_EQ(test, enable_val, ctx->fake_reg); in clk_gate_test_disable()
245 u32 enable_val = 0; in clk_gate_test_invert_enable() local
249 KUNIT_EXPECT_EQ(test, enable_val, ctx->fake_reg); in clk_gate_test_invert_enable()
262 u32 enable_val = 0; in clk_gate_test_invert_disable() local
266 KUNIT_ASSERT_EQ(test, enable_val, ctx->fake_reg); in clk_gate_test_invert_disable()
318 u32 enable_val = BIT(9) | BIT(9 + 16); in clk_gate_test_hiword_enable() local
322 KUNIT_EXPECT_EQ(test, enable_val, ct in clk_gate_test_hiword_enable()
335 u32 enable_val = BIT(9) | BIT(9 + 16); clk_gate_test_hiword_disable() local
[all...]
/kernel/linux/linux-5.10/drivers/leds/
H A Dleds-lm36274.c53 int enable_val = 0; in lm36274_init() local
57 enable_val |= (1 << chip->led_sources[i]); in lm36274_init()
59 if (!enable_val) { in lm36274_init()
64 enable_val |= LM36274_BL_EN; in lm36274_init()
66 return regmap_write(chip->regmap, LM36274_REG_BL_EN, enable_val); in lm36274_init()
/kernel/linux/linux-6.6/drivers/leds/
H A Dleds-lm36274.c54 int enable_val = 0; in lm36274_init() local
58 enable_val |= (1 << chip->led_sources[i]); in lm36274_init()
60 if (!enable_val) { in lm36274_init()
65 enable_val |= LM36274_BL_EN; in lm36274_init()
67 return regmap_write(chip->regmap, LM36274_REG_BL_EN, enable_val); in lm36274_init()
/kernel/linux/linux-5.10/drivers/clocksource/
H A Djcore-pit.c39 u32 enable_val; member
75 writel(pit->enable_val, pit->base + REG_PITEN); in jcore_pit_set()
141 u32 irqprio, enable_val; in jcore_pit_init() local
214 enable_val = (1U << PIT_ENABLE_SHIFT) in jcore_pit_init()
239 pit->enable_val = enable_val; in jcore_pit_init()
/kernel/linux/linux-5.10/drivers/regulator/
H A Dbd9576-regulator.c106 .enable_val = BD957X_REGULATOR_DIS_VAL,
125 .enable_val = BD957X_REGULATOR_DIS_VAL,
143 .enable_val = BD957X_REGULATOR_DIS_VAL,
162 .enable_val = BD957X_REGULATOR_DIS_VAL,
181 .enable_val = BD957X_REGULATOR_DIS_VAL,
198 .enable_val = BD957X_REGULATOR_DIS_VAL,
H A Dstpmic1_regulator.c210 .enable_val = 1, \
230 .enable_val = 1, \
252 .enable_val = 1, \
272 .enable_val = 1, \
293 .enable_val = 1, \
310 .enable_val = BOOST_ENABLED, \
327 .enable_val = USBSW_OTG_SWITCH_ENABLED, \
347 .enable_val = SWIN_SWOUT_ENABLED, \
H A Drk808-regulator.c86 .enable_val = (_enval), \
110 .enable_val = (_enval), \
142 .enable_val = (_enval), \
577 if (rdev->desc->enable_val) in rk8xx_is_enabled_wmsk_regmap()
578 return val != rdev->desc->enable_val; in rk8xx_is_enabled_wmsk_regmap()
581 if (rdev->desc->enable_val) in rk8xx_is_enabled_wmsk_regmap()
582 return val == rdev->desc->enable_val; in rk8xx_is_enabled_wmsk_regmap()
911 .enable_val = ENABLE_MASK(RK817_ID_DCDC1),
930 .enable_val = ENABLE_MASK(RK817_ID_DCDC2),
949 .enable_val
[all...]
H A Dhelpers.c39 if (rdev->desc->enable_val) in regulator_is_enabled_regmap()
40 return val != rdev->desc->enable_val; in regulator_is_enabled_regmap()
43 if (rdev->desc->enable_val) in regulator_is_enabled_regmap()
44 return val == rdev->desc->enable_val; in regulator_is_enabled_regmap()
66 val = rdev->desc->enable_val; in regulator_enable_regmap()
90 val = rdev->desc->enable_val; in regulator_disable_regmap()
H A Dqcom-labibb-regulator.c59 .enable_val = LABIBB_CONTROL_ENABLE,
71 .enable_val = LABIBB_CONTROL_ENABLE,
H A Dcpcap-regulator.c122 .enable_val = (mode_val), \
178 if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) { in cpcap_regulator_enable()
198 if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) { in cpcap_regulator_disable()
206 if (error && (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC)) { in cpcap_regulator_disable()
H A Dmax77693-regulator.c177 .enable_val = CHG_CNFG_00_CHG_MASK | CHG_CNFG_00_BUCK_MASK,
217 .enable_val = MAX77843_CHG_MASK,
H A Dstw481x-vmmc.c50 .enable_val = STW_CONF1_PDN_VMMC,
H A Dtps6105x-regulator.c51 .enable_val = TPS6105X_REG0_MODE_VOLTAGE <<
/kernel/linux/linux-6.6/drivers/clocksource/
H A Djcore-pit.c36 u32 enable_val; member
72 writel(pit->enable_val, pit->base + REG_PITEN); in jcore_pit_set()
138 u32 irqprio, enable_val; in jcore_pit_init() local
211 enable_val = (1U << PIT_ENABLE_SHIFT) in jcore_pit_init()
236 pit->enable_val = enable_val; in jcore_pit_init()
/kernel/linux/linux-6.6/drivers/regulator/
H A Dstpmic1_regulator.c211 .enable_val = 1, \
231 .enable_val = 1, \
253 .enable_val = 1, \
273 .enable_val = 1, \
294 .enable_val = 1, \
311 .enable_val = BOOST_ENABLED, \
328 .enable_val = USBSW_OTG_SWITCH_ENABLED, \
348 .enable_val = SWIN_SWOUT_ENABLED, \
H A Drk808-regulator.c95 .enable_val = (_enval), \
119 .enable_val = (_enval), \
148 .enable_val = ENABLE_MASK(ctrl_bit),\
179 .enable_val = (_enval), \
739 if (rdev->desc->enable_val) in rk8xx_is_enabled_wmsk_regmap()
740 return val != rdev->desc->enable_val; in rk8xx_is_enabled_wmsk_regmap()
743 if (rdev->desc->enable_val) in rk8xx_is_enabled_wmsk_regmap()
744 return val == rdev->desc->enable_val; in rk8xx_is_enabled_wmsk_regmap()
1245 .enable_val = ENABLE_MASK(RK817_ID_DCDC1),
1268 .enable_val
[all...]
H A Dhelpers.c40 if (rdev->desc->enable_val) in regulator_is_enabled_regmap()
41 return val != rdev->desc->enable_val; in regulator_is_enabled_regmap()
44 if (rdev->desc->enable_val) in regulator_is_enabled_regmap()
45 return val == rdev->desc->enable_val; in regulator_is_enabled_regmap()
67 val = rdev->desc->enable_val; in regulator_enable_regmap()
91 val = rdev->desc->enable_val; in regulator_disable_regmap()
H A Dcpcap-regulator.c114 .enable_val = (mode_val), \
170 if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) { in cpcap_regulator_enable()
190 if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) { in cpcap_regulator_disable()
198 if (error && (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC)) { in cpcap_regulator_disable()
H A Dbd9576-regulator.c610 .enable_val = BD957X_REGULATOR_DIS_VAL,
633 .enable_val = BD957X_REGULATOR_DIS_VAL,
655 .enable_val = BD957X_REGULATOR_DIS_VAL,
678 .enable_val = BD957X_REGULATOR_DIS_VAL,
701 .enable_val = BD957X_REGULATOR_DIS_VAL,
722 .enable_val = BD957X_REGULATOR_DIS_VAL,
H A Dmax77693-regulator.c177 .enable_val = CHG_CNFG_00_CHG_MASK | CHG_CNFG_00_BUCK_MASK,
217 .enable_val = MAX77843_CHG_MASK,
/kernel/linux/linux-6.6/drivers/video/backlight/
H A Dmt6370-backlight.c77 unsigned int enable_val; in mt6370_bl_update_status() local
93 enable_val = brightness ? MT6370_BL_EN_MASK : 0; in mt6370_bl_update_status()
95 MT6370_BL_EN_MASK, enable_val); in mt6370_bl_update_status()
/kernel/linux/linux-5.10/drivers/media/cec/platform/seco/
H A Dseco-cec.c154 u16 enable_val = 0; in secocec_adap_log_addr() local
158 status = smb_rd16(SECOCEC_ENABLE_REG_1, &enable_val); in secocec_adap_log_addr()
163 enable_val & ~SECOCEC_ENABLE_REG_1_CEC); in secocec_adap_log_addr()
176 enable_val | SECOCEC_ENABLE_REG_1_CEC); in secocec_adap_log_addr()
/kernel/linux/linux-6.6/drivers/media/cec/platform/seco/
H A Dseco-cec.c141 u16 enable_val = 0; in secocec_adap_log_addr() local
145 status = smb_rd16(SECOCEC_ENABLE_REG_1, &enable_val); in secocec_adap_log_addr()
150 enable_val & ~SECOCEC_ENABLE_REG_1_CEC); in secocec_adap_log_addr()
163 enable_val | SECOCEC_ENABLE_REG_1_CEC); in secocec_adap_log_addr()

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