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/kernel/linux/linux-6.6/drivers/gpu/drm/i915/
H A DMakefile83 display/intel_display_debugfs.o \
84 display/intel_pipe_crc.o
230 display/hsw_ips.o \
231 display/intel_atomic.o \
232 display/intel_atomic_plane.o \
233 display/intel_audio.o \
234 display/intel_bios.o \
235 display/intel_bw.o \
236 display/intel_cdclk.o \
237 display/intel_colo
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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
H A DMakefile73 display/intel_display_debugfs.o \
74 display/intel_pipe_crc.o
191 display/intel_atomic.o \
192 display/intel_atomic_plane.o \
193 display/intel_audio.o \
194 display/intel_bios.o \
195 display/intel_bw.o \
196 display/intel_cdclk.o \
197 display/intel_color.o \
198 display/intel_combo_ph
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H A Di915_pci.c31 #include "display/intel_fbdev.h"
164 .display.has_overlay = 1, \
165 .display.cursor_needs_physical = 1, \
166 .display.overlay_needs_physical = 1, \
167 .display.has_gmch = 1, \
185 .display.has_overlay = 1, \
186 .display.overlay_needs_physical = 1, \
187 .display.has_gmch = 1, \
214 .display.has_fbc = 1,
220 .display
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/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dintel_frontbuffer.c51 * The other type of display power saving feature only cares about busyness
84 spin_lock(&i915->display.fb_tracking.lock); in frontbuffer_flush()
85 frontbuffer_bits &= ~i915->display.fb_tracking.busy_bits; in frontbuffer_flush()
86 spin_unlock(&i915->display.fb_tracking.lock); in frontbuffer_flush()
114 spin_lock(&i915->display.fb_tracking.lock); in intel_frontbuffer_flip_prepare()
115 i915->display.fb_tracking.flip_bits |= frontbuffer_bits; in intel_frontbuffer_flip_prepare()
117 i915->display.fb_tracking.busy_bits &= ~frontbuffer_bits; in intel_frontbuffer_flip_prepare()
118 spin_unlock(&i915->display.fb_tracking.lock); in intel_frontbuffer_flip_prepare()
134 spin_lock(&i915->display.fb_tracking.lock); in intel_frontbuffer_flip_complete()
136 frontbuffer_bits &= i915->display in intel_frontbuffer_flip_complete()
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H A Dintel_hotplug.c35 * Simply put, hotplug occurs when a display is connected to or disconnected
71 * seen when display port sink is connected, hence on platforms whose DP
74 * this is specific to DP sinks handled by this routine and any other display
126 * stored in @dev_priv->display.hotplug.hpd_storm_threshold which defaults to
132 * &dev_priv->display.hotplug.hpd_storm_threshold. However, some older systems also
147 struct intel_hotplug *hpd = &dev_priv->display.hotplug; in intel_hpd_irq_storm_detect()
155 (!long_hpd && !dev_priv->display.hotplug.hpd_short_storm_enabled)) in intel_hpd_irq_storm_detect()
197 dev_priv->display.hotplug.stats[pin].state != HPD_MARK_DISABLED) in intel_hpd_irq_storm_switch_to_polling()
205 dev_priv->display.hotplug.stats[pin].state = HPD_DISABLED; in intel_hpd_irq_storm_switch_to_polling()
216 &dev_priv->display in intel_hpd_irq_storm_switch_to_polling()
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H A Dintel_wm.c47 if (i915->display.funcs.wm->update_wm) in intel_update_watermarks()
48 i915->display.funcs.wm->update_wm(i915); in intel_update_watermarks()
56 if (i915->display.funcs.wm->compute_pipe_wm) in intel_compute_pipe_wm()
57 return i915->display.funcs.wm->compute_pipe_wm(state, crtc); in intel_compute_pipe_wm()
67 if (!i915->display.funcs.wm->compute_intermediate_wm) in intel_compute_intermediate_wm()
70 if (drm_WARN_ON(&i915->drm, !i915->display.funcs.wm->compute_pipe_wm)) in intel_compute_intermediate_wm()
73 return i915->display.funcs.wm->compute_intermediate_wm(state, crtc); in intel_compute_intermediate_wm()
81 if (i915->display.funcs.wm->initial_watermarks) { in intel_initial_watermarks()
82 i915->display.funcs.wm->initial_watermarks(state, crtc); in intel_initial_watermarks()
94 if (i915->display in intel_atomic_update_watermarks()
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H A Dintel_lpe_audio.c80 #define HAS_LPE_AUDIO(dev_priv) ((dev_priv)->display.audio.lpe.platdev != NULL)
101 rsc[0].start = rsc[0].end = dev_priv->display.audio.lpe.irq; in lpe_audio_platdev_create()
153 platform_device_unregister(dev_priv->display.audio.lpe.platdev); in lpe_audio_platdev_destroy()
172 int irq = dev_priv->display.audio.lpe.irq; in lpe_audio_irq_init()
209 dev_priv->display.audio.lpe.irq = irq_alloc_desc(0); in lpe_audio_setup()
210 if (dev_priv->display.audio.lpe.irq < 0) { in lpe_audio_setup()
212 dev_priv->display.audio.lpe.irq); in lpe_audio_setup()
213 ret = dev_priv->display.audio.lpe.irq; in lpe_audio_setup()
217 drm_dbg(&dev_priv->drm, "irq = %d\n", dev_priv->display.audio.lpe.irq); in lpe_audio_setup()
228 dev_priv->display in lpe_audio_setup()
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H A Dintel_dkl_phy.c20 spin_lock_init(&i915->display.dkl.phy_lock); in intel_dkl_phy_init()
49 spin_lock(&i915->display.dkl.phy_lock); in intel_dkl_phy_read()
54 spin_unlock(&i915->display.dkl.phy_lock); in intel_dkl_phy_read()
70 spin_lock(&i915->display.dkl.phy_lock); in intel_dkl_phy_write()
75 spin_unlock(&i915->display.dkl.phy_lock); in intel_dkl_phy_write()
91 spin_lock(&i915->display.dkl.phy_lock); in intel_dkl_phy_rmw()
96 spin_unlock(&i915->display.dkl.phy_lock); in intel_dkl_phy_rmw()
109 spin_lock(&i915->display.dkl.phy_lock); in intel_dkl_phy_posting_read()
114 spin_unlock(&i915->display.dkl.phy_lock); in intel_dkl_phy_posting_read()
H A Dintel_cdclk.c46 * The display engine uses several different clocks to do its work. There
49 * are the core display clock (CDCLK) and RAWCLK.
51 * CDCLK clocks most of the display pipe logic, and thus its frequency
57 * to minimize power consumption for a given display configuration.
58 * Typically changes to the CDCLK frequency require all the display pipes
84 dev_priv->display.funcs.cdclk->get_cdclk(dev_priv, cdclk_config); in intel_cdclk_get_cdclk()
91 dev_priv->display.funcs.cdclk->set_cdclk(dev_priv, cdclk_config, pipe); in intel_cdclk_set_cdclk()
97 return dev_priv->display.funcs.cdclk->modeset_calc_cdclk(cdclk_config); in intel_cdclk_modeset_calc_cdclk()
103 return dev_priv->display.funcs.cdclk->calc_voltage_level(cdclk); in intel_cdclk_calc_voltage_level()
374 "Unknown pnv display cor in pnv_get_cdclk()
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H A Dintel_audio.c389 struct i915_audio_component *acomp = i915->display.audio.component; in hsw_dp_audio_config_update()
437 struct i915_audio_component *acomp = i915->display.audio.component; in hsw_hdmi_audio_config_update()
492 mutex_lock(&i915->display.audio.mutex); in hsw_audio_codec_disable()
514 mutex_unlock(&i915->display.audio.mutex); in hsw_audio_codec_disable()
532 cdclk = i915->display.cdclk.hw.cdclk; in calc_hblank_early_prog()
633 mutex_lock(&i915->display.audio.mutex); in hsw_audio_codec_enable()
657 mutex_unlock(&i915->display.audio.mutex); in hsw_audio_codec_enable()
701 mutex_lock(&i915->display.audio.mutex); in ibx_audio_codec_disable()
716 mutex_unlock(&i915->display.audio.mutex); in ibx_audio_codec_disable()
739 mutex_lock(&i915->display in ibx_audio_codec_enable()
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H A Dintel_hti.c16 * any display resources before we create our display outputs. in intel_hti_init()
19 i915->display.hti.state = intel_de_read(i915, HDPORT_STATE); in intel_hti_init()
27 return i915->display.hti.state & HDPORT_ENABLED && in intel_hti_uses_phy()
28 i915->display.hti.state & HDPORT_DDI_USED(phy); in intel_hti_uses_phy()
33 if (!(i915->display.hti.state & HDPORT_ENABLED)) in intel_hti_dpll_mask()
40 return REG_FIELD_GET(HDPORT_DPLL_USED_MASK, i915->display.hti.state); in intel_hti_dpll_mask()
H A Dintel_display_driver.c5 * High level display driver entry points. This is a layer between top level
6 * driver code and low level display functionality; no low level display code or
12 #include <drm/display/drm_dp_mst_helper.h>
86 cdclk_state = to_intel_cdclk_state(i915->display.cdclk.obj.state); in intel_display_driver_init_hw()
89 intel_cdclk_dump_config(i915, &i915->display.cdclk.hw, "Current CDCLK"); in intel_display_driver_init_hw()
90 cdclk_state->logical = cdclk_state->actual = i915->display.cdclk.hw; in intel_display_driver_init_hw()
114 INIT_LIST_HEAD(&i915->display.global.obj_list); in intel_mode_config_init()
226 i915->display.wq.modeset = alloc_ordered_workqueue("i915_modeset", 0); in intel_display_driver_probe_noirq()
227 i915->display in intel_display_driver_probe_noirq()
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H A Dintel_hotplug_irq.c136 struct intel_hotplug *hpd = &dev_priv->display.hotplug; in intel_hpd_init_pins()
182 /* For display hotplug interrupt */
373 if (dev_priv->display.hotplug.stats[encoder->hpd_pin].state == HPD_ENABLED) in intel_hpd_enabled_irqs()
467 dev_priv->display.hotplug.hpd, in i9xx_hpd_irq_handler()
504 dev_priv->display.hotplug.pch_hpd, in ibx_hpd_irq_handler()
520 if (!(i915->display.hotplug.hpd[pin] & hotplug_trigger)) in xelpdp_pica_irq_handler()
564 dev_priv->display.hotplug.pch_hpd, in icp_irq_handler()
575 dev_priv->display.hotplug.pch_hpd, in icp_irq_handler()
600 dev_priv->display.hotplug.pch_hpd, in spt_irq_handler()
611 dev_priv->display in spt_irq_handler()
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H A Dintel_display_power.c262 power_domains = &dev_priv->display.power.domains; in intel_display_power_is_enabled()
275 struct i915_power_domains *power_domains = &i915->display.power.domains; in sanitize_target_dc_state()
311 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in intel_display_power_set_target_dc_state()
359 display.power.domains); in assert_async_put_domain_masks_disjoint()
372 display.power.domains); in __async_put_domains_state_ok()
395 display.power.domains); in print_power_domains()
410 display.power.domains); in print_async_put_domains_state()
476 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in intel_display_power_grab_async_put_ref()
505 struct i915_power_domains *power_domains = &dev_priv->display.power.domains; in __intel_display_power_get_domain()
532 struct i915_power_domains *power_domains = &dev_priv->display in intel_display_power_get()
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H A Dintel_bios.c28 #include <drm/display/drm_dp_helper.h>
29 #include <drm/display/drm_dsc_helper.h>
46 * through other means. The configuration is mostly related to display
149 list_for_each_entry(entry, &i915->display.vbt.bdb_blocks, node) { in bdb_find_section()
373 if (i915->display.vbt.version < 155) in generate_lfp_data_ptrs()
504 list_add_tail(&entry->node, &i915->display.vbt.bdb_blocks); in init_bdb_block()
906 if (i915->display.vbt.version >= 188) { in parse_lfp_data()
932 if (i915->display.vbt.version < 229) in parse_generic_dtd()
1037 if (i915->display.vbt.version >= 191) { in parse_lfp_backlight()
1040 if (i915->display in parse_lfp_backlight()
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/kernel/linux/linux-5.10/drivers/acpi/acpica/
H A Dutbuffer.c22 * display - BYTE, WORD, DWORD, or QWORD display:
27 * base_offset - Beginning buffer offset (display only)
34 void acpi_ut_dump_buffer(u8 *buffer, u32 count, u32 display, u32 base_offset) in acpi_ut_dump_buffer() argument
40 u32 display_data_only = display & DB_DISPLAY_DATA_ONLY; in acpi_ut_dump_buffer()
42 display &= ~DB_DISPLAY_DATA_ONLY; in acpi_ut_dump_buffer()
49 display = DB_BYTE_DISPLAY; in acpi_ut_dump_buffer()
69 acpi_os_printf("%*s", ((display * 2) + 1), " "); in acpi_ut_dump_buffer()
70 j += display; in acpi_ut_dump_buffer()
74 switch (display) { in acpi_ut_dump_buffer()
170 acpi_ut_debug_dump_buffer(u8 *buffer, u32 count, u32 display, u32 component_id) acpi_ut_debug_dump_buffer() argument
205 acpi_ut_dump_buffer_to_file(ACPI_FILE file, u8 *buffer, u32 count, u32 display, u32 base_offset) acpi_ut_dump_buffer_to_file() argument
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/kernel/linux/linux-6.6/drivers/acpi/acpica/
H A Dutbuffer.c22 * display - BYTE, WORD, DWORD, or QWORD display:
27 * base_offset - Beginning buffer offset (display only)
34 void acpi_ut_dump_buffer(u8 *buffer, u32 count, u32 display, u32 base_offset) in acpi_ut_dump_buffer() argument
40 u32 display_data_only = display & DB_DISPLAY_DATA_ONLY; in acpi_ut_dump_buffer()
42 display &= ~DB_DISPLAY_DATA_ONLY; in acpi_ut_dump_buffer()
49 display = DB_BYTE_DISPLAY; in acpi_ut_dump_buffer()
69 acpi_os_printf("%*s", ((display * 2) + 1), " "); in acpi_ut_dump_buffer()
70 j += display; in acpi_ut_dump_buffer()
74 switch (display) { in acpi_ut_dump_buffer()
170 acpi_ut_debug_dump_buffer(u8 *buffer, u32 count, u32 display, u32 component_id) acpi_ut_debug_dump_buffer() argument
205 acpi_ut_dump_buffer_to_file(ACPI_FILE file, u8 *buffer, u32 count, u32 display, u32 base_offset) acpi_ut_dump_buffer_to_file() argument
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/kernel/linux/linux-5.10/drivers/video/fbdev/omap2/omapfb/
H A Domapfb-ioctl.c206 struct omap_dss_device *display = fb2display(fbi); in omapfb_setup_mem() local
216 if (display && display->driver->sync) in omapfb_setup_mem()
217 display->driver->sync(display); in omapfb_setup_mem()
281 struct omap_dss_device *display = fb2display(fbi); in omapfb_update_window() local
284 if (!display) in omapfb_update_window()
290 display->driver->get_resolution(display, &dw, &dh); in omapfb_update_window()
295 return display in omapfb_update_window()
301 struct omap_dss_device *display = fb2display(fbi); omapfb_set_update_mode() local
344 struct omap_dss_device *display = fb2display(fbi); omapfb_get_update_mode() local
478 struct omap_dss_device *display = fb2display(fbi); omapfb_memory_read() local
576 struct omap_dss_device *display = fb2display(fbi); omapfb_ioctl() local
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/kernel/linux/linux-6.6/drivers/video/fbdev/omap2/omapfb/
H A Domapfb-ioctl.c206 struct omap_dss_device *display = fb2display(fbi); in omapfb_setup_mem() local
216 if (display && display->driver->sync) in omapfb_setup_mem()
217 display->driver->sync(display); in omapfb_setup_mem()
281 struct omap_dss_device *display = fb2display(fbi); in omapfb_update_window() local
284 if (!display) in omapfb_update_window()
290 display->driver->get_resolution(display, &dw, &dh); in omapfb_update_window()
295 return display in omapfb_update_window()
301 struct omap_dss_device *display = fb2display(fbi); omapfb_set_update_mode() local
344 struct omap_dss_device *display = fb2display(fbi); omapfb_get_update_mode() local
478 struct omap_dss_device *display = fb2display(fbi); omapfb_memory_read() local
576 struct omap_dss_device *display = fb2display(fbi); omapfb_ioctl() local
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/kernel/linux/linux-5.10/drivers/staging/fbtft/
H A Dfbtft-core.c252 "%s: start_line=%u is larger than end_line=%u. Shouldn't happen, will do full display update\n", in fbtft_update_display()
260 "%s: start_line=%u or end_line=%u is larger than max=%d. Shouldn't happen, will do full display update\n", in fbtft_update_display()
279 "%s: write_vmem failed to update display buffer\n", in fbtft_update_display()
313 /* Mark display lines/area as dirty */ in fbtft_mkdirty()
321 /* Schedule deferred_io to update display (no-op if already on queue)*/ in fbtft_mkdirty()
337 /* set display line markers as clean */ in fbtft_deferred_io()
342 /* Mark display lines as dirty */ in fbtft_deferred_io()
520 * @display: pointer to structure describing the display
522 * @pdata: platform data for the display i
536 fbtft_framebuffer_alloc(struct fbtft_display *display, struct device *dev, struct fbtft_platform_data *pdata) fbtft_framebuffer_alloc() argument
1197 fbtft_probe_common(struct fbtft_display *display, struct spi_device *sdev, struct platform_device *pdev) fbtft_probe_common() argument
[all...]
/kernel/linux/linux-6.6/drivers/staging/fbtft/
H A Dfbtft-core.c251 "%s: start_line=%u is larger than end_line=%u. Shouldn't happen, will do full display update\n", in fbtft_update_display()
259 "%s: start_line=%u or end_line=%u is larger than max=%d. Shouldn't happen, will do full display update\n", in fbtft_update_display()
278 "%s: write_vmem failed to update display buffer\n", in fbtft_update_display()
312 /* Mark display lines/area as dirty */ in fbtft_mkdirty()
320 /* Schedule deferred_io to update display (no-op if already on queue)*/ in fbtft_mkdirty()
335 /* set display line markers as clean */ in fbtft_deferred_io()
340 /* Mark display lines as dirty */ in fbtft_deferred_io()
517 * @display: pointer to structure describing the display
519 * @pdata: platform data for the display i
533 fbtft_framebuffer_alloc(struct fbtft_display *display, struct device *dev, struct fbtft_platform_data *pdata) fbtft_framebuffer_alloc() argument
1193 fbtft_probe_common(struct fbtft_display *display, struct spi_device *sdev, struct platform_device *pdev) fbtft_probe_common() argument
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/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/modules/hdcp/
H A Dhdcp.c255 struct mod_hdcp_display *display, in update_display_adjustments()
262 display->adjust.disable == true && in update_display_adjustments()
264 display->adjust.disable = false; in update_display_adjustments()
271 display->adjust.disable = true; in update_display_adjustments()
275 memcmp(adj, &display->adjust, in update_display_adjustments()
320 struct mod_hdcp_link *link, struct mod_hdcp_display *display, in mod_hdcp_add_display()
326 HDCP_TOP_INTERFACE_TRACE_WITH_INDEX(hdcp, display->index); in mod_hdcp_add_display()
329 /* skip inactive display */ in mod_hdcp_add_display()
330 if (display->state != MOD_HDCP_DISPLAY_ACTIVE) { in mod_hdcp_add_display()
335 /* check existing display containe in mod_hdcp_add_display()
254 update_display_adjustments(struct mod_hdcp *hdcp, struct mod_hdcp_display *display, struct mod_hdcp_display_adjustment *adj) update_display_adjustments() argument
319 mod_hdcp_add_display(struct mod_hdcp *hdcp, struct mod_hdcp_link *link, struct mod_hdcp_display *display, struct mod_hdcp_output *output) mod_hdcp_add_display() argument
382 struct mod_hdcp_display *display = NULL; mod_hdcp_remove_display() local
428 struct mod_hdcp_display *display = NULL; mod_hdcp_update_display() local
488 struct mod_hdcp_display *display = NULL; mod_hdcp_query_display() local
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H A Dhdcp_psp.c53 struct mod_hdcp_display *display = in remove_display_from_topology_v2() local
59 if (!display || !is_display_active(display)) in remove_display_from_topology_v2()
67 dtm_cmd->dtm_in_message.topology_update_v2.display_handle = display->index; in remove_display_from_topology_v2()
76 display->state = MOD_HDCP_DISPLAY_ACTIVE; in remove_display_from_topology_v2()
77 HDCP_TOP_REMOVE_DISPLAY_TRACE(hdcp, display->index); in remove_display_from_topology_v2()
89 struct mod_hdcp_display *display = in remove_display_from_topology_v3() local
95 if (!display || !is_display_active(display)) in remove_display_from_topology_v3()
103 dtm_cmd->dtm_in_message.topology_update_v3.display_handle = display in remove_display_from_topology_v3()
122 add_display_to_topology_v2( struct mod_hdcp *hdcp, struct mod_hdcp_display *display) add_display_to_topology_v2() argument
169 add_display_to_topology_v3( struct mod_hdcp *hdcp, struct mod_hdcp_display *display) add_display_to_topology_v3() argument
237 mod_hdcp_add_display_to_topology(struct mod_hdcp *hdcp, struct mod_hdcp_display *display) mod_hdcp_add_display_to_topology() argument
254 struct mod_hdcp_display *display = get_first_active_display(hdcp); mod_hdcp_hdcp1_create_session() local
368 struct mod_hdcp_display *display = get_first_active_display(hdcp); mod_hdcp_hdcp1_enable_encryption() local
499 struct mod_hdcp_display *display = get_first_active_display(hdcp); mod_hdcp_hdcp2_create_session() local
830 struct mod_hdcp_display *display = get_first_active_display(hdcp); mod_hdcp_hdcp2_enable_encryption() local
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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
H A Dintel_cdclk.c35 * The display engine uses several different clocks to do its work. There
38 * are the core display clock (CDCLK) and RAWCLK.
40 * CDCLK clocks most of the display pipe logic, and thus its frequency
46 * to minimize power consumption for a given display configuration.
47 * Typically changes to the CDCLK frequency require all the display pipes
328 "Unknown pnv display core clock 0x%04x\n", gcfgc); in pnv_get_cdclk()
557 * issuing a modeset without actually changing any display after in vlv_set_cdclk()
558 * a system suspend. So grab the display core domain, which covers in vlv_set_cdclk()
604 * so that the core display fetch happens in time to avoid underruns. in vlv_set_cdclk()
645 * issuing a modeset without actually changing any display afte in chv_set_cdclk()
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/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dnv50.c282 nv50_gr_mp_trap(struct nv50_gr *gr, int tpid, int display) in nv50_gr_mp_trap() argument
302 if (display) { in nv50_gr_mp_trap()
319 if (!mps && display) in nv50_gr_mp_trap()
326 u32 ustatus_new, int display, const char *name) in nv50_gr_tp_trap()
348 if (display) { in nv50_gr_tp_trap()
365 nv50_gr_mp_trap(gr, i, display); in nv50_gr_tp_trap()
368 if (ustatus && display) { in nv50_gr_tp_trap()
377 if (display) in nv50_gr_tp_trap()
384 if (display) in nv50_gr_tp_trap()
390 if (!tps && display) in nv50_gr_tp_trap()
325 nv50_gr_tp_trap(struct nv50_gr *gr, int type, u32 ustatus_old, u32 ustatus_new, int display, const char *name) nv50_gr_tp_trap() argument
395 nv50_gr_trap_handler(struct nv50_gr *gr, u32 display, int chid, u64 inst, const char *name) nv50_gr_trap_handler() argument
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