Home
last modified time | relevance | path

Searched refs:disp_int (Results 1 - 20 of 20) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
H A Drs600.c720 rdev->irq.stat_regs.r500.disp_int = RREG32(R_007EDC_DISP_INTERRUPT_STATUS); in rs600_irq_ack()
721 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
725 if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
729 if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
734 if (G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
740 rdev->irq.stat_regs.r500.disp_int = 0; in rs600_irq_ack()
780 !rdev->irq.stat_regs.r500.disp_int && in rs600_irq_process()
785 rdev->irq.stat_regs.r500.disp_int || in rs600_irq_process()
792 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_process()
801 if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_process()
[all...]
H A Dr600.c3920 rdev->irq.stat_regs.r600.disp_int = RREG32(DCE3_DISP_INTERRUPT_STATUS); in r600_irq_ack()
3931 rdev->irq.stat_regs.r600.disp_int = RREG32(DISP_INTERRUPT_STATUS); in r600_irq_ack()
3944 if (rdev->irq.stat_regs.r600.disp_int & LB_D1_VBLANK_INTERRUPT) in r600_irq_ack()
3946 if (rdev->irq.stat_regs.r600.disp_int & LB_D1_VLINE_INTERRUPT) in r600_irq_ack()
3948 if (rdev->irq.stat_regs.r600.disp_int & LB_D2_VBLANK_INTERRUPT) in r600_irq_ack()
3950 if (rdev->irq.stat_regs.r600.disp_int & LB_D2_VLINE_INTERRUPT) in r600_irq_ack()
3952 if (rdev->irq.stat_regs.r600.disp_int & DC_HPD1_INTERRUPT) { in r600_irq_ack()
3963 if (rdev->irq.stat_regs.r600.disp_int & DC_HPD2_INTERRUPT) { in r600_irq_ack()
4138 if (!(rdev->irq.stat_regs.r600.disp_int & LB_D1_VBLANK_INTERRUPT)) in r600_irq_process()
4148 rdev->irq.stat_regs.r600.disp_int in r600_irq_process()
[all...]
H A Devergreen.c4616 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in evergreen_irq_ack() local
4620 disp_int[i] = RREG32(evergreen_disp_int_status[i]); in evergreen_irq_ack()
4635 if (disp_int[j] & LB_D1_VBLANK_INTERRUPT) in evergreen_irq_ack()
4638 if (disp_int[j] & LB_D1_VLINE_INTERRUPT) in evergreen_irq_ack()
4645 if (disp_int[i] & DC_HPD1_INTERRUPT) in evergreen_irq_ack()
4650 if (disp_int[i] & DC_HPD1_RX_INTERRUPT) in evergreen_irq_ack()
4703 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in evergreen_irq_process() local
4775 if (!(disp_int[crtc_id in evergreen_irq_process()
[all...]
H A Dsi.c6152 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in si_irq_ack() local
6159 disp_int[i] = RREG32(si_disp_int_status[i]); in si_irq_ack()
6173 if (disp_int[j] & LB_D1_VBLANK_INTERRUPT) in si_irq_ack()
6176 if (disp_int[j] & LB_D1_VLINE_INTERRUPT) in si_irq_ack()
6183 if (disp_int[i] & DC_HPD1_INTERRUPT) in si_irq_ack()
6188 if (disp_int[i] & DC_HPD1_RX_INTERRUPT) in si_irq_ack()
6251 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in si_irq_process() local
6322 if (!(disp_int[crtc_id in si_irq_process()
[all...]
H A Dcik.c7300 rdev->irq.stat_regs.cik.disp_int = RREG32(DISP_INTERRUPT_STATUS); in cik_irq_ack()
7331 if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT) in cik_irq_ack()
7333 if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT) in cik_irq_ack()
7374 if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_INTERRUPT) { in cik_irq_ack()
7404 if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_RX_INTERRUPT) { in cik_irq_ack()
7595 if (!(rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT)) in cik_irq_process()
7605 rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VBLANK_INTERRUPT; in cik_irq_process()
7610 if (!(rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT)) in cik_irq_process()
7613 rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VLINE_INTERRUPT; in cik_irq_process()
7785 if (!(rdev->irq.stat_regs.cik.disp_int in cik_irq_process()
[all...]
H A Dradeon.h754 u32 disp_int; member
759 u32 disp_int; member
769 u32 disp_int[6]; member
775 u32 disp_int; member
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
H A Drs600.c727 rdev->irq.stat_regs.r500.disp_int = RREG32(R_007EDC_DISP_INTERRUPT_STATUS); in rs600_irq_ack()
728 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
732 if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
736 if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
741 if (G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
747 rdev->irq.stat_regs.r500.disp_int = 0; in rs600_irq_ack()
787 !rdev->irq.stat_regs.r500.disp_int && in rs600_irq_process()
792 rdev->irq.stat_regs.r500.disp_int || in rs600_irq_process()
799 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_process()
808 if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_process()
[all...]
H A Dr600.c3917 rdev->irq.stat_regs.r600.disp_int = RREG32(DCE3_DISP_INTERRUPT_STATUS); in r600_irq_ack()
3928 rdev->irq.stat_regs.r600.disp_int = RREG32(DISP_INTERRUPT_STATUS); in r600_irq_ack()
3941 if (rdev->irq.stat_regs.r600.disp_int & LB_D1_VBLANK_INTERRUPT) in r600_irq_ack()
3943 if (rdev->irq.stat_regs.r600.disp_int & LB_D1_VLINE_INTERRUPT) in r600_irq_ack()
3945 if (rdev->irq.stat_regs.r600.disp_int & LB_D2_VBLANK_INTERRUPT) in r600_irq_ack()
3947 if (rdev->irq.stat_regs.r600.disp_int & LB_D2_VLINE_INTERRUPT) in r600_irq_ack()
3949 if (rdev->irq.stat_regs.r600.disp_int & DC_HPD1_INTERRUPT) { in r600_irq_ack()
3960 if (rdev->irq.stat_regs.r600.disp_int & DC_HPD2_INTERRUPT) { in r600_irq_ack()
4135 if (!(rdev->irq.stat_regs.r600.disp_int & LB_D1_VBLANK_INTERRUPT)) in r600_irq_process()
4145 rdev->irq.stat_regs.r600.disp_int in r600_irq_process()
[all...]
H A Dsi.c6147 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in si_irq_ack() local
6154 disp_int[i] = RREG32(si_disp_int_status[i]); in si_irq_ack()
6168 if (disp_int[j] & LB_D1_VBLANK_INTERRUPT) in si_irq_ack()
6171 if (disp_int[j] & LB_D1_VLINE_INTERRUPT) in si_irq_ack()
6178 if (disp_int[i] & DC_HPD1_INTERRUPT) in si_irq_ack()
6183 if (disp_int[i] & DC_HPD1_RX_INTERRUPT) in si_irq_ack()
6246 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in si_irq_process() local
6317 if (!(disp_int[crtc_id in si_irq_process()
[all...]
H A Devergreen.c4618 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in evergreen_irq_ack() local
4622 disp_int[i] = RREG32(evergreen_disp_int_status[i]); in evergreen_irq_ack()
4637 if (disp_int[j] & LB_D1_VBLANK_INTERRUPT) in evergreen_irq_ack()
4640 if (disp_int[j] & LB_D1_VLINE_INTERRUPT) in evergreen_irq_ack()
4647 if (disp_int[i] & DC_HPD1_INTERRUPT) in evergreen_irq_ack()
4652 if (disp_int[i] & DC_HPD1_RX_INTERRUPT) in evergreen_irq_ack()
4705 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in evergreen_irq_process() local
4777 if (!(disp_int[crtc_id in evergreen_irq_process()
[all...]
H A Dcik.c7289 rdev->irq.stat_regs.cik.disp_int = RREG32(DISP_INTERRUPT_STATUS); in cik_irq_ack()
7320 if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT) in cik_irq_ack()
7322 if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT) in cik_irq_ack()
7363 if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_INTERRUPT) { in cik_irq_ack()
7393 if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_RX_INTERRUPT) { in cik_irq_ack()
7584 if (!(rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT)) in cik_irq_process()
7594 rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VBLANK_INTERRUPT; in cik_irq_process()
7599 if (!(rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT)) in cik_irq_process()
7602 rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VLINE_INTERRUPT; in cik_irq_process()
7774 if (!(rdev->irq.stat_regs.cik.disp_int in cik_irq_process()
[all...]
H A Dradeon.h709 u32 disp_int; member
714 u32 disp_int; member
724 u32 disp_int[6]; member
730 u32 disp_int; member
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v11_0.c3363 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v11_0_crtc_irq() local
3369 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v11_0_crtc_irq()
3381 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v11_0_crtc_irq()
3401 uint32_t disp_int, mask; in dce_v11_0_hpd_irq() local
3410 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v11_0_hpd_irq()
3413 if (disp_int & mask) { in dce_v11_0_hpd_irq()
H A Ddce_v8_0.c3048 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v8_0_crtc_irq() local
3054 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v8_0_crtc_irq()
3065 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v8_0_crtc_irq()
3160 uint32_t disp_int, mask, tmp; in dce_v8_0_hpd_irq() local
3169 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v8_0_hpd_irq()
3172 if (disp_int & mask) { in dce_v8_0_hpd_irq()
H A Ddce_v10_0.c3237 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v10_0_crtc_irq() local
3242 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v10_0_crtc_irq()
3254 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v10_0_crtc_irq()
3274 uint32_t disp_int, mask; in dce_v10_0_hpd_irq() local
3283 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v10_0_hpd_irq()
3286 if (disp_int & mask) { in dce_v10_0_hpd_irq()
H A Ddce_v6_0.c2958 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v6_0_crtc_irq() local
2964 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v6_0_crtc_irq()
2975 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v6_0_crtc_irq()
3070 uint32_t disp_int, mask, tmp; in dce_v6_0_hpd_irq() local
3079 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v6_0_hpd_irq()
3082 if (disp_int & mask) { in dce_v6_0_hpd_irq()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v8_0.c3067 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v8_0_crtc_irq() local
3073 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v8_0_crtc_irq()
3084 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v8_0_crtc_irq()
3179 uint32_t disp_int, mask, tmp; in dce_v8_0_hpd_irq() local
3188 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v8_0_hpd_irq()
3191 if (disp_int & mask) { in dce_v8_0_hpd_irq()
H A Ddce_v11_0.c3378 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v11_0_crtc_irq() local
3384 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v11_0_crtc_irq()
3396 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v11_0_crtc_irq()
3416 uint32_t disp_int, mask; in dce_v11_0_hpd_irq() local
3425 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v11_0_hpd_irq()
3428 if (disp_int & mask) { in dce_v11_0_hpd_irq()
H A Ddce_v10_0.c3247 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v10_0_crtc_irq() local
3252 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v10_0_crtc_irq()
3264 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v10_0_crtc_irq()
3284 uint32_t disp_int, mask; in dce_v10_0_hpd_irq() local
3293 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v10_0_hpd_irq()
3296 if (disp_int & mask) { in dce_v10_0_hpd_irq()
H A Ddce_v6_0.c2979 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v6_0_crtc_irq() local
2985 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v6_0_crtc_irq()
2996 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v6_0_crtc_irq()
3091 uint32_t disp_int, mask, tmp; in dce_v6_0_hpd_irq() local
3100 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v6_0_hpd_irq()
3103 if (disp_int & mask) { in dce_v6_0_hpd_irq()

Completed in 96 milliseconds