Searched refs:cpwcr (Results 1 - 8 of 8) sorted by relevance
| /kernel/linux/linux-5.10/arch/csky/abiv1/inc/abi/ |
| H A D | ckmmu.h | 15 cpwcr("cpcr0", value); in write_mmu_index()
30 cpwcr("cpcr6", value); in write_mmu_pagemask()
40 cpwcr("cpcr4", value); in write_mmu_entryhi()
50 cpwcr("cpcr30", value); in write_mmu_msa0()
60 cpwcr("cpcr31", value); in write_mmu_msa1()
68 cpwcr("cpcr8", 0x80000000); in tlb_probe()
73 cpwcr("cpcr8", 0x40000000); in tlb_read()
78 cpwcr("cpcr8", 0x04000000); in tlb_invalid_all()
89 cpwcr("cpcr8", 0x02000000); in tlb_invalid_indexed()
94 cpwcr("cpcr2 in setup_pgd()
[all...] |
| H A D | entry.h | 147 cpwcr \rx, cpcr4
151 cpwcr \rx, cpcr8
172 cpwcr r6, cpcr30
175 cpwcr r6, cpcr31
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| H A D | reg_ops.h | 15 #define cpwcr(reg, val) \ macro
17 asm volatile("cpwcr %0, "reg"\n"::"b"(val)); \
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| /kernel/linux/linux-6.6/arch/csky/abiv1/inc/abi/ |
| H A D | ckmmu.h | 14 cpwcr("cpcr0", value); in write_mmu_index()
29 cpwcr("cpcr6", value); in write_mmu_pagemask()
39 cpwcr("cpcr4", value); in write_mmu_entryhi()
49 cpwcr("cpcr30", value); in write_mmu_msa0()
59 cpwcr("cpcr31", value); in write_mmu_msa1()
67 cpwcr("cpcr8", 0x80000000); in tlb_probe()
72 cpwcr("cpcr8", 0x40000000); in tlb_read()
77 cpwcr("cpcr8", 0x04000000); in tlb_invalid_all()
88 cpwcr("cpcr8", 0x02000000); in tlb_invalid_indexed()
93 cpwcr("cpcr2 in setup_pgd()
[all...] |
| H A D | entry.h | 146 cpwcr \rx, cpcr4
150 cpwcr \rx, cpcr8
171 cpwcr r6, cpcr30
174 cpwcr r6, cpcr31
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| H A D | reg_ops.h | 14 #define cpwcr(reg, val) \ macro
16 asm volatile("cpwcr %0, "reg"\n"::"b"(val)); \
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| /kernel/linux/linux-5.10/arch/csky/kernel/ |
| H A D | perf_event.c | 80 #define cpwcr(reg, val) \ macro
83 "cpwcr %0, "reg"\n" \
912 cpwcr(HPOFSR, ~BIT(hwc->idx) & cprcr(HPOFSR)); in csky_pmu_event_set_period()
942 cpwcr(HPCR, BIT(31) | BIT(30) | BIT(1)); in csky_pmu_reset()
1012 cpwcr(HPCR, csky_pmu.hpcr); in csky_pmu_enable()
1018 cpwcr(HPCR, BIT(1)); in csky_pmu_disable()
1039 cpwcr(HPINTENR, BIT(idx) | cprcr(HPINTENR)); in csky_pmu_start()
1040 cpwcr(HPCNTENR, BIT(idx) | cprcr(HPCNTENR)); in csky_pmu_start()
1053 cpwcr(HPINTENR, ~BIT(idx) & cprcr(HPINTENR)); in csky_pmu_stop_event()
1054 cpwcr(HPCNTEN in csky_pmu_stop_event()
[all...] |
| /kernel/linux/linux-6.6/arch/csky/kernel/ |
| H A D | perf_event.c | 80 #define cpwcr(reg, val) \ macro
83 "cpwcr %0, "reg"\n" \
912 cpwcr(HPOFSR, ~BIT(hwc->idx) & cprcr(HPOFSR)); in csky_pmu_event_set_period()
942 cpwcr(HPCR, BIT(31) | BIT(30) | BIT(1)); in csky_pmu_reset()
1012 cpwcr(HPCR, csky_pmu.hpcr); in csky_pmu_enable()
1018 cpwcr(HPCR, BIT(1)); in csky_pmu_disable()
1039 cpwcr(HPINTENR, BIT(idx) | cprcr(HPINTENR)); in csky_pmu_start()
1040 cpwcr(HPCNTENR, BIT(idx) | cprcr(HPCNTENR)); in csky_pmu_start()
1053 cpwcr(HPINTENR, ~BIT(idx) & cprcr(HPINTENR)); in csky_pmu_stop_event()
1054 cpwcr(HPCNTEN in csky_pmu_stop_event()
[all...] |
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