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Searched refs:cntr_val (Results 1 - 16 of 16) sorted by relevance

/kernel/linux/linux-6.6/drivers/net/ethernet/marvell/octeontx2/nic/
H A Dotx2_tc.c871 static int otx2_del_mcam_flow_entry(struct otx2_nic *nic, u16 entry, u16 *cntr_val) in otx2_del_mcam_flow_entry() argument
895 if (cntr_val) { in otx2_del_mcam_flow_entry()
905 *cntr_val = rsp->cntr_val; in otx2_del_mcam_flow_entry()
919 u16 cntr_val = 0; in otx2_tc_update_mcam_table_del_req() local
932 otx2_del_mcam_flow_entry(nic, tmp->entry, &cntr_val); in otx2_tc_update_mcam_table_del_req()
935 tmp->req.cntr_val = cntr_val; in otx2_tc_update_mcam_table_del_req()
958 u16 cntr_val = 0; in otx2_tc_update_mcam_table_add_req() local
971 otx2_del_mcam_flow_entry(nic, tmp->entry, &cntr_val); in otx2_tc_update_mcam_table_add_req()
[all...]
/kernel/linux/linux-5.10/drivers/hwtracing/coresight/
H A Dcoresight-etm4x.h233 * @cntr_val: Sets or returns the value for a counter.
277 u32 cntr_val[ETMv4_MAX_CNTR]; member
351 u32 cntr_val[ETMv4_MAX_CNTR]; member
H A Dcoresight-etm3x-core.c226 config->cntr_val[i] = 0x0; in etm_set_default()
397 etm_writel(drvdata, config->cntr_val[i], ETMCNTVRn(i)); in etm_enable_hw()
577 config->cntr_val[i] = etm_readl(drvdata, ETMCNTVRn(i)); in etm_disable_hw()
H A Dcoresight-etm.h161 * @cntr_val: counter value register.
193 u32 cntr_val[ETM_MAX_CNTR]; member
H A Dcoresight-etm3x-sysfs.c728 i, config->cntr_val[i]); in cntr_val_show()
755 config->cntr_val[config->cntr_idx] = val; in cntr_val_store()
760 static DEVICE_ATTR_RW(cntr_val);
H A Dcoresight-etm4x-core.c159 writel_relaxed(config->cntr_val[i], in etm4_enable_hw()
269 if (config->cntr_val[ctridx] == 0) in etm4_config_timestamp_event()
303 config->cntr_val[ctridx] = 1; in etm4_config_timestamp_event()
519 config->cntr_val[i] = in etm4_disable_hw()
H A Dcoresight-etm4x-sysfs.c235 config->cntr_val[i] = 0x0; in reset_store()
1585 val = config->cntr_val[idx]; in cntr_val_show()
1606 config->cntr_val[idx] = val; in cntr_val_store()
1610 static DEVICE_ATTR_RW(cntr_val);
/kernel/linux/linux-6.6/drivers/hwtracing/coresight/
H A Dcoresight-etm4x-cfg.c125 CHECKREGIDX(TRCCNTVRn(0), cntr_val, idx, off_mask); in etm4_cfg_map_reg_offset()
H A Dcoresight-etm3x-core.c227 config->cntr_val[i] = 0x0; in etm_set_default()
403 etm_writel(drvdata, config->cntr_val[i], ETMCNTVRn(i)); in etm_enable_hw()
600 config->cntr_val[i] = etm_readl(drvdata, ETMCNTVRn(i)); in etm_disable_hw()
H A Dcoresight-etm.h161 * @cntr_val: counter value register.
193 u32 cntr_val[ETM_MAX_CNTR]; member
H A Dcoresight-etm3x-sysfs.c729 i, config->cntr_val[i]); in cntr_val_show()
756 config->cntr_val[config->cntr_idx] = val; in cntr_val_store()
761 static DEVICE_ATTR_RW(cntr_val);
H A Dcoresight-etm4x-core.c465 etm4x_relaxed_write32(csa, config->cntr_val[i], TRCCNTVRn(i)); in etm4_enable_hw()
580 if (config->cntr_val[ctridx] == 0) in etm4_config_timestamp_event()
614 config->cntr_val[ctridx] = 1; in etm4_config_timestamp_event()
918 config->cntr_val[i] = in etm4_disable_hw()
H A Dcoresight-etm4x-sysfs.c236 config->cntr_val[i] = 0x0; in reset_store()
1594 val = config->cntr_val[idx]; in cntr_val_show()
1615 config->cntr_val[idx] = val; in cntr_val_store()
1619 static DEVICE_ATTR_RW(cntr_val);
H A Dcoresight-etm4x.h821 * @cntr_val: Sets or returns the value for a counter.
865 u32 cntr_val[ETMv4_MAX_CNTR]; member
939 u32 cntr_val[ETMv4_MAX_CNTR]; member
/kernel/linux/linux-6.6/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_npc_fs.c1221 rvu_write64(rvu, blkaddr, NPC_AF_MATCH_STATX(rule->cntr), req->cntr_val); in npc_install_flow()
1460 rsp->cntr_val = rvu_read64(rvu, blkaddr, in rvu_mbox_handler_npc_delete_flow()
H A Dmbox.h1513 u16 cntr_val; member
1531 u16 cntr_val; member

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