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Help
Searched
refs:cmn_clk_cfg1
(Results
1 - 5
of
5
) sorted by relevance
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/pll/
H
A
D
dsi_pll_10nm.c
538
u32 cmn_clk_cfg0,
cmn_clk_cfg1
;
in dsi_pll_10nm_save_state()
local
548
cmn_clk_cfg1
= pll_read(phy_base + REG_DSI_10nm_PHY_CMN_CLK_CFG1);
in dsi_pll_10nm_save_state()
549
cached->pll_mux =
cmn_clk_cfg1
& 0x3;
in dsi_pll_10nm_save_state()
H
A
D
dsi_pll_7nm.c
564
u32 cmn_clk_cfg0,
cmn_clk_cfg1
;
in dsi_pll_7nm_save_state()
local
574
cmn_clk_cfg1
= pll_read(phy_base + REG_DSI_7nm_PHY_CMN_CLK_CFG1);
in dsi_pll_7nm_save_state()
575
cached->pll_mux =
cmn_clk_cfg1
& 0x3;
in dsi_pll_7nm_save_state()
H
A
D
dsi_pll_14nm.c
104
u32
cmn_clk_cfg1
;
member
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/dsi/phy/
H
A
D
dsi_phy_10nm.c
489
u32 cmn_clk_cfg0,
cmn_clk_cfg1
;
in dsi_10nm_pll_save_state()
local
499
cmn_clk_cfg1
= dsi_phy_read(phy_base + REG_DSI_10nm_PHY_CMN_CLK_CFG1);
in dsi_10nm_pll_save_state()
500
cached->pll_mux =
cmn_clk_cfg1
& 0x3;
in dsi_10nm_pll_save_state()
H
A
D
dsi_phy_7nm.c
538
u32 cmn_clk_cfg0,
cmn_clk_cfg1
;
in dsi_7nm_pll_save_state()
local
548
cmn_clk_cfg1
= dsi_phy_read(phy_base + REG_DSI_7nm_PHY_CMN_CLK_CFG1);
in dsi_7nm_pll_save_state()
549
cached->pll_mux =
cmn_clk_cfg1
& 0x3;
in dsi_7nm_pll_save_state()
Completed in 9 milliseconds