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Searched refs:clk_cfg1 (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/media/dvb-frontends/
H A Ddib7000m.c201 u16 clk_cfg1 = dib7000m_read_word(state, 909) & 0xfffd; in dib7000m_set_output_mode() local
203 clk_cfg1 |= (1 << 1); // P_O_CLK_en in dib7000m_set_output_mode()
204 dib7000m_write_word(state, 909, clk_cfg1); in dib7000m_set_output_mode()
420 dib7000m_write_word(state, 908, 0x0006); // clk_cfg1 in dib7000m_reset_pll()
428 u16 clk_cfg1; in dib7000mc_reset_pll() local
433 // clk_cfg1 in dib7000mc_reset_pll()
435 clk_cfg1 = (0 << 14) | (3 << 12) |(0 << 11) | in dib7000mc_reset_pll()
438 dib7000m_write_word(state, 908, clk_cfg1); in dib7000mc_reset_pll()
439 clk_cfg1 = (clk_cfg1 in dib7000mc_reset_pll()
[all...]
H A Ddib8000.c696 u16 clk_cfg1, reg; in dib8000_reset_pll() local
702 clk_cfg1 = (1 << 10) | (0 << 9) | (pll->IO_CLK_en_core << 8) | in dib8000_reset_pll()
707 dib8000_write_word(state, 902, clk_cfg1); in dib8000_reset_pll()
708 clk_cfg1 = (clk_cfg1 & 0xfff7) | (pll->pll_bypass << 3); in dib8000_reset_pll()
709 dib8000_write_word(state, 902, clk_cfg1); in dib8000_reset_pll()
711 dprintk("clk_cfg1: 0x%04x\n", clk_cfg1); in dib8000_reset_pll()
/kernel/linux/linux-6.6/drivers/media/dvb-frontends/
H A Ddib7000m.c201 u16 clk_cfg1 = dib7000m_read_word(state, 909) & 0xfffd; in dib7000m_set_output_mode() local
203 clk_cfg1 |= (1 << 1); // P_O_CLK_en in dib7000m_set_output_mode()
204 dib7000m_write_word(state, 909, clk_cfg1); in dib7000m_set_output_mode()
420 dib7000m_write_word(state, 908, 0x0006); // clk_cfg1 in dib7000m_reset_pll()
428 u16 clk_cfg1; in dib7000mc_reset_pll() local
433 // clk_cfg1 in dib7000mc_reset_pll()
435 clk_cfg1 = (0 << 14) | (3 << 12) |(0 << 11) | in dib7000mc_reset_pll()
438 dib7000m_write_word(state, 908, clk_cfg1); in dib7000mc_reset_pll()
439 clk_cfg1 = (clk_cfg1 in dib7000mc_reset_pll()
[all...]
H A Ddib8000.c696 u16 clk_cfg1, reg; in dib8000_reset_pll() local
702 clk_cfg1 = (1 << 10) | (0 << 9) | (pll->IO_CLK_en_core << 8) | in dib8000_reset_pll()
707 dib8000_write_word(state, 902, clk_cfg1); in dib8000_reset_pll()
708 clk_cfg1 = (clk_cfg1 & 0xfff7) | (pll->pll_bypass << 3); in dib8000_reset_pll()
709 dib8000_write_word(state, 902, clk_cfg1); in dib8000_reset_pll()
711 dprintk("clk_cfg1: 0x%04x\n", clk_cfg1); in dib8000_reset_pll()

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