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Searched refs:ath12k_hif_write32 (Results 1 - 5 of 5) sorted by relevance

/kernel/linux/linux-6.6/drivers/net/wireless/ath/ath12k/
H A Dhal_tx.c81 ath12k_hif_write32(ab, HAL_SEQ_WCSS_UMAC_TCL_REG + in ath12k_hal_tx_set_dscp_tid_map()
127 ath12k_hif_write32(ab, addr, *(u32 *)&hw_map_val[i]); in ath12k_hal_tx_set_dscp_tid_map()
135 ath12k_hif_write32(ab, HAL_SEQ_WCSS_UMAC_TCL_REG + in ath12k_hal_tx_set_dscp_tid_map()
143 ath12k_hif_write32(ab, HAL_TCL_SW_CONFIG_BANK_ADDR + 4 * bank_id, in ath12k_hal_tx_configure_bank_register()
H A Dhal.c1250 ath12k_hif_write32(ab, addr, val); in ath12k_hal_ce_dst_setup()
1264 ath12k_hif_write32(ab, reg_base + in ath12k_hal_srng_dst_hw_init()
1271 ath12k_hif_write32(ab, reg_base + in ath12k_hal_srng_dst_hw_init()
1274 ath12k_hif_write32(ab, in ath12k_hal_srng_dst_hw_init()
1279 ath12k_hif_write32(ab, reg_base, srng->ring_base_paddr); in ath12k_hal_srng_dst_hw_init()
1285 ath12k_hif_write32(ab, reg_base + ath12k_hal_reo1_ring_base_msb_offset(ab), val); in ath12k_hal_srng_dst_hw_init()
1289 ath12k_hif_write32(ab, reg_base + ath12k_hal_reo1_ring_id_offset(ab), val); in ath12k_hal_srng_dst_hw_init()
1298 ath12k_hif_write32(ab, in ath12k_hal_srng_dst_hw_init()
1305 ath12k_hif_write32(ab, reg_base + ath12k_hal_reo1_ring_hp_addr_lsb_offset(ab), in ath12k_hal_srng_dst_hw_init()
1307 ath12k_hif_write32(a in ath12k_hal_srng_dst_hw_init()
[all...]
H A Dhal_rx.c825 ath12k_hif_write32(ab, reo_base + HAL_REO1_GEN_ENABLE, val); in ath12k_hal_reo_hw_setup()
835 ath12k_hif_write32(ab, reo_base + HAL_REO1_MISC_CTRL_ADDR(ab), val); in ath12k_hal_reo_hw_setup()
837 ath12k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_0(ab), in ath12k_hal_reo_hw_setup()
839 ath12k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_1(ab), in ath12k_hal_reo_hw_setup()
841 ath12k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_2(ab), in ath12k_hal_reo_hw_setup()
843 ath12k_hif_write32(ab, reo_base + HAL_REO1_AGING_THRESH_IX_3(ab), in ath12k_hal_reo_hw_setup()
846 ath12k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_2, in ath12k_hal_reo_hw_setup()
848 ath12k_hif_write32(ab, reo_base + HAL_REO1_DEST_RING_CTRL_IX_3, in ath12k_hal_reo_hw_setup()
H A Ddp.c1225 ath12k_hif_write32(ab, in ath12k_dp_reoq_lut_cleanup()
1258 ath12k_hif_write32(ab, reo_base + HAL_REO1_SW_COOKIE_CFG0(ab), cmem_base); in ath12k_dp_cc_config()
1270 ath12k_hif_write32(ab, reo_base + HAL_REO1_SW_COOKIE_CFG1(ab), val); in ath12k_dp_cc_config()
1273 ath12k_hif_write32(ab, wbm_base + HAL_WBM_SW_COOKIE_CFG0, cmem_base); in ath12k_dp_cc_config()
1283 ath12k_hif_write32(ab, wbm_base + HAL_WBM_SW_COOKIE_CFG1, val); in ath12k_dp_cc_config()
1291 ath12k_hif_write32(ab, wbm_base + HAL_WBM_SW_COOKIE_CFG2, val); in ath12k_dp_cc_config()
1298 ath12k_hif_write32(ab, wbm_base + HAL_WBM_SW_COOKIE_CONVERT_CFG, val); in ath12k_dp_cc_config()
1467 ath12k_hif_write32(ab, cmem_base + ATH12K_PPT_ADDR_OFFSET(i), in ath12k_dp_cc_init()
1499 ath12k_hif_write32(ab, HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_QDESC_LUT_BASE0(ab), in ath12k_dp_reoq_lut_setup()
H A Dhif.h128 static inline void ath12k_hif_write32(struct ath12k_base *ab, u32 address, in ath12k_hif_write32() function

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