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Searched refs:arm_smmu_gr0_write (Results 1 - 8 of 8) sorted by relevance

/kernel/linux/linux-5.10/drivers/iommu/arm/arm-smmu/
H A Darm-smmu-qcom.c65 arm_smmu_gr0_write(smmu, last_s2cr, reg); in qcom_smmu_cfg_probe()
130 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_S2CR(idx), reg); in qcom_smmu_write_s2cr()
H A Darm-smmu.c276 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_TLBIVMID, smmu_domain->cfg.vmid); in arm_smmu_tlb_inv_context_s2()
398 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_TLBIVMID, smmu_domain->cfg.vmid); in arm_smmu_tlb_add_page_s2_v1()
476 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sGFSR, gfsr); in arm_smmu_global_fault()
926 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_SMR(idx), reg); in arm_smmu_write_smr()
946 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_S2CR(idx), reg); in arm_smmu_write_s2cr()
986 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_SMR(i), smr); in arm_smmu_test_smr_masks()
991 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_SMR(i), smr); in arm_smmu_test_smr_masks()
1647 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sGFSR, reg); in arm_smmu_device_reset()
1663 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_TLBIALLH, QCOM_DUMMY_VAL); in arm_smmu_device_reset()
1664 arm_smmu_gr0_write(smm in arm_smmu_device_reset()
[all...]
H A Darm-smmu-impl.c132 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sACR, reg); in arm_mmu500_reset()
H A Darm-smmu.h504 #define arm_smmu_gr0_write(s, o, v) \ macro
/kernel/linux/linux-6.6/drivers/iommu/arm/arm-smmu/
H A Darm-smmu.c257 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_TLBIVMID, smmu_domain->cfg.vmid); in arm_smmu_tlb_inv_context_s2()
370 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_TLBIVMID, smmu_domain->cfg.vmid); in arm_smmu_tlb_add_page_s2_v1()
450 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sGFSR, gfsr); in arm_smmu_global_fault()
896 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_SMR(idx), reg); in arm_smmu_write_smr()
916 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_S2CR(idx), reg); in arm_smmu_write_s2cr()
956 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_SMR(i), smr); in arm_smmu_test_smr_masks()
961 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_SMR(i), smr); in arm_smmu_test_smr_masks()
1594 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sGFSR, reg); in arm_smmu_device_reset()
1610 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_TLBIALLH, QCOM_DUMMY_VAL); in arm_smmu_device_reset()
1611 arm_smmu_gr0_write(smm in arm_smmu_device_reset()
[all...]
H A Darm-smmu-impl.c129 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sACR, reg); in arm_mmu500_reset()
H A Darm-smmu-qcom.c303 arm_smmu_gr0_write(smmu, last_s2cr, reg); in qcom_smmu_cfg_probe()
368 arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_S2CR(idx), reg); in qcom_smmu_write_s2cr()
H A Darm-smmu.h510 #define arm_smmu_gr0_write(s, o, v) \ macro

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