__offset_BLEND (reference) in projects: kernel - OpenGrok search results

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Searched refs:__offset_BLEND (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/mdp5/
H A D	mdp5.xml.h	1105 static inline uint32_t __offset_BLEND(uint32_t idx) in __offset_BLEND() function 1118 static inline uint32_t REG_MDP5_LM_BLEND(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_LM(i0) + __offset_BLEND(i1); } in REG_MDP5_LM_BLEND() 1120 static inline uint32_t REG_MDP5_LM_BLEND_OP_MODE(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_LM(i0) + __offset_BLEND(i1); } in REG_MDP5_LM_BLEND_OP_MODE() 1142 static inline uint32_t REG_MDP5_LM_BLEND_FG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000004 + __offset_LM(i0) + __offset_BLEND(i1); } in REG_MDP5_LM_BLEND_FG_ALPHA() 1144 static inline uint32_t REG_MDP5_LM_BLEND_BG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000008 + __offset_LM(i0) + __offset_BLEND(i1); } in REG_MDP5_LM_BLEND_BG_ALPHA() 1146 static inline uint32_t REG_MDP5_LM_BLEND_FG_TRANSP_LOW0(uint32_t i0, uint32_t i1) { return 0x0000000c + __offset_LM(i0) + __offset_BLEND(i1); } in REG_MDP5_LM_BLEND_FG_TRANSP_LOW0() 1148 static inline uint32_t REG_MDP5_LM_BLEND_FG_TRANSP_LOW1(uint32_t i0, uint32_t i1) { return 0x00000010 + __offset_LM(i0) + __offset_BLEND(i1); } in REG_MDP5_LM_BLEND_FG_TRANSP_LOW1() 1150 static inline uint32_t REG_MDP5_LM_BLEND_FG_TRANSP_HIGH0(uint32_t i0, uint32_t i1) { return 0x00000014 + __offset_LM(i0) + __offset_BLEND(i1); } in REG_MDP5_LM_BLEND_FG_TRANSP_HIGH0() 1152 static inline uint32_t REG_MDP5_LM_BLEND_FG_TRANSP_HIGH1(uint32_t i0, uint32_t i1) { return 0x00000018 + __offset_LM(i0) + __offset_BLEND(i1); } in REG_MDP5_LM_BLEND_FG_TRANSP_HIGH1() 1154 static inline uint32_t REG_MDP5_LM_BLEND_BG_TRANSP_LOW0(uint32_t i0, uint32_t i1) { return 0x0000001c + __offset_LM(i0) + __offset_BLEND(i [all...]
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/disp/mdp5/
H A D	mdp5.xml.h	1116 static inline uint32_t __offset_BLEND(uint32_t idx) in __offset_BLEND() function 1129 static inline uint32_t REG_MDP5_LM_BLEND(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_LM(i0) + __offset_BLEND(i1); } in REG_MDP5_LM_BLEND() 1131 static inline uint32_t REG_MDP5_LM_BLEND_OP_MODE(uint32_t i0, uint32_t i1) { return 0x00000000 + __offset_LM(i0) + __offset_BLEND(i1); } in REG_MDP5_LM_BLEND_OP_MODE() 1153 static inline uint32_t REG_MDP5_LM_BLEND_FG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000004 + __offset_LM(i0) + __offset_BLEND(i1); } in REG_MDP5_LM_BLEND_FG_ALPHA() 1155 static inline uint32_t REG_MDP5_LM_BLEND_BG_ALPHA(uint32_t i0, uint32_t i1) { return 0x00000008 + __offset_LM(i0) + __offset_BLEND(i1); } in REG_MDP5_LM_BLEND_BG_ALPHA() 1157 static inline uint32_t REG_MDP5_LM_BLEND_FG_TRANSP_LOW0(uint32_t i0, uint32_t i1) { return 0x0000000c + __offset_LM(i0) + __offset_BLEND(i1); } in REG_MDP5_LM_BLEND_FG_TRANSP_LOW0() 1159 static inline uint32_t REG_MDP5_LM_BLEND_FG_TRANSP_LOW1(uint32_t i0, uint32_t i1) { return 0x00000010 + __offset_LM(i0) + __offset_BLEND(i1); } in REG_MDP5_LM_BLEND_FG_TRANSP_LOW1() 1161 static inline uint32_t REG_MDP5_LM_BLEND_FG_TRANSP_HIGH0(uint32_t i0, uint32_t i1) { return 0x00000014 + __offset_LM(i0) + __offset_BLEND(i1); } in REG_MDP5_LM_BLEND_FG_TRANSP_HIGH0() 1163 static inline uint32_t REG_MDP5_LM_BLEND_FG_TRANSP_HIGH1(uint32_t i0, uint32_t i1) { return 0x00000018 + __offset_LM(i0) + __offset_BLEND(i1); } in REG_MDP5_LM_BLEND_FG_TRANSP_HIGH1() 1165 static inline uint32_t REG_MDP5_LM_BLEND_BG_TRANSP_LOW0(uint32_t i0, uint32_t i1) { return 0x0000001c + __offset_LM(i0) + __offset_BLEND(i [all...]

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