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/kernel/linux/linux-5.10/arch/sparc/include/uapi/asm/
H A Dpstate.h18 #define PSTATE_IG _AC(0x0000000000000800,UL) /* Interrupt Globals. */
19 #define PSTATE_MCDE _AC(0x0000000000000800,UL) /* MCD Enable */
20 #define PSTATE_MG _AC(0x0000000000000400,UL) /* MMU Globals. */
21 #define PSTATE_CLE _AC(0x0000000000000200,UL) /* Current Little Endian.*/
22 #define PSTATE_TLE _AC(0x0000000000000100,UL) /* Trap Little Endian. */
23 #define PSTATE_MM _AC(0x00000000000000c0,UL) /* Memory Model. */
24 #define PSTATE_TSO _AC(0x0000000000000000,UL) /* MM: TotalStoreOrder */
25 #define PSTATE_PSO _AC(0x0000000000000040,UL) /* MM: PartialStoreOrder */
26 #define PSTATE_RMO _AC(0x0000000000000080,UL) /* MM: RelaxedMemoryOrder*/
27 #define PSTATE_RED _AC(
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/kernel/linux/linux-6.6/arch/sparc/include/uapi/asm/
H A Dpstate.h18 #define PSTATE_IG _AC(0x0000000000000800,UL) /* Interrupt Globals. */
19 #define PSTATE_MCDE _AC(0x0000000000000800,UL) /* MCD Enable */
20 #define PSTATE_MG _AC(0x0000000000000400,UL) /* MMU Globals. */
21 #define PSTATE_CLE _AC(0x0000000000000200,UL) /* Current Little Endian.*/
22 #define PSTATE_TLE _AC(0x0000000000000100,UL) /* Trap Little Endian. */
23 #define PSTATE_MM _AC(0x00000000000000c0,UL) /* Memory Model. */
24 #define PSTATE_TSO _AC(0x0000000000000000,UL) /* MM: TotalStoreOrder */
25 #define PSTATE_PSO _AC(0x0000000000000040,UL) /* MM: PartialStoreOrder */
26 #define PSTATE_RMO _AC(0x0000000000000080,UL) /* MM: RelaxedMemoryOrder*/
27 #define PSTATE_RED _AC(
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/kernel/linux/linux-5.10/arch/sparc/include/asm/
H A Ddcu.h8 #define DCU_CP _AC(0x0002000000000000,UL) /* Phys Cache Enable w/o mmu */
9 #define DCU_CV _AC(0x0001000000000000,UL) /* Virt Cache Enable w/o mmu */
10 #define DCU_ME _AC(0x0000800000000000,UL) /* NC-store Merging Enable */
11 #define DCU_RE _AC(0x0000400000000000,UL) /* RAW bypass Enable */
12 #define DCU_PE _AC(0x0000200000000000,UL) /* PCache Enable */
13 #define DCU_HPE _AC(0x0000100000000000,UL) /* HW prefetch Enable */
14 #define DCU_SPE _AC(0x0000080000000000,UL) /* SW prefetch Enable */
15 #define DCU_SL _AC(0x0000040000000000,UL) /* Secondary ld-steering Enab*/
16 #define DCU_WE _AC(0x0000020000000000,UL) /* WCache enable */
17 #define DCU_PM _AC(
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H A Dsfafsr.h9 #define SFAFSR_ME (_AC(1,UL) << SFAFSR_ME_SHIFT)
11 #define SFAFSR_PRIV (_AC(1,UL) << SFAFSR_PRIV_SHIFT)
13 #define SFAFSR_ISAP (_AC(1,UL) << SFAFSR_ISAP_SHIFT)
15 #define SFAFSR_ETP (_AC(1,UL) << SFAFSR_ETP_SHIFT)
17 #define SFAFSR_IVUE (_AC(1,UL) << SFAFSR_IVUE_SHIFT)
19 #define SFAFSR_TO (_AC(1,UL) << SFAFSR_TO_SHIFT)
21 #define SFAFSR_BERR (_AC(1,UL) << SFAFSR_BERR_SHIFT)
23 #define SFAFSR_LDP (_AC(1,UL) << SFAFSR_LDP_SHIFT)
25 #define SFAFSR_CP (_AC(1,UL) << SFAFSR_CP_SHIFT)
27 #define SFAFSR_WP (_AC(
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H A Dpgtable_64.h37 #define TLBTEMP_BASE _AC(0x0000000006000000,UL)
38 #define TSBMAP_8K_BASE _AC(0x0000000008000000,UL)
39 #define TSBMAP_4M_BASE _AC(0x0000000008400000,UL)
40 #define MODULES_VADDR _AC(0x0000000010000000,UL)
41 #define MODULES_LEN _AC(0x00000000e0000000,UL)
42 #define MODULES_END _AC(0x00000000f0000000,UL)
43 #define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL)
44 #define HI_OBP_ADDRESS _AC(0x0000000100000000,UL)
45 #define VMALLOC_START _AC(0x0000000100000000,UL)
52 #define PMD_SIZE (_AC(
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H A Dlsu.h8 #define LSU_CONTROL_PM _AC(0x000001fe00000000,UL) /* Phys-watchpoint byte mask*/
9 #define LSU_CONTROL_VM _AC(0x00000001fe000000,UL) /* Virt-watchpoint byte mask*/
10 #define LSU_CONTROL_PR _AC(0x0000000001000000,UL) /* Phys-rd watchpoint enable*/
11 #define LSU_CONTROL_PW _AC(0x0000000000800000,UL) /* Phys-wr watchpoint enable*/
12 #define LSU_CONTROL_VR _AC(0x0000000000400000,UL) /* Virt-rd watchpoint enable*/
13 #define LSU_CONTROL_VW _AC(0x0000000000200000,UL) /* Virt-wr watchpoint enable*/
14 #define LSU_CONTROL_FM _AC(0x00000000000ffff0,UL) /* Parity mask enables. */
15 #define LSU_CONTROL_DM _AC(0x0000000000000008,UL) /* Data MMU enable. */
16 #define LSU_CONTROL_IM _AC(0x0000000000000004,UL) /* Instruction MMU enable. */
17 #define LSU_CONTROL_DC _AC(
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H A Dmmu_64.h11 #define TAG_CONTEXT_BITS ((_AC(1,UL) << CTX_NR_BITS) - _AC(1,UL))
22 #define CTX_PGSZ_8KB _AC(0x0,UL)
23 #define CTX_PGSZ_64KB _AC(0x1,UL)
24 #define CTX_PGSZ_512KB _AC(0x2,UL)
25 #define CTX_PGSZ_4MB _AC(0x3,UL)
26 #define CTX_PGSZ_BITS _AC(0x7,UL)
/kernel/linux/linux-6.6/arch/sparc/include/asm/
H A Ddcu.h8 #define DCU_CP _AC(0x0002000000000000,UL) /* Phys Cache Enable w/o mmu */
9 #define DCU_CV _AC(0x0001000000000000,UL) /* Virt Cache Enable w/o mmu */
10 #define DCU_ME _AC(0x0000800000000000,UL) /* NC-store Merging Enable */
11 #define DCU_RE _AC(0x0000400000000000,UL) /* RAW bypass Enable */
12 #define DCU_PE _AC(0x0000200000000000,UL) /* PCache Enable */
13 #define DCU_HPE _AC(0x0000100000000000,UL) /* HW prefetch Enable */
14 #define DCU_SPE _AC(0x0000080000000000,UL) /* SW prefetch Enable */
15 #define DCU_SL _AC(0x0000040000000000,UL) /* Secondary ld-steering Enab*/
16 #define DCU_WE _AC(0x0000020000000000,UL) /* WCache enable */
17 #define DCU_PM _AC(
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H A Dsfafsr.h9 #define SFAFSR_ME (_AC(1,UL) << SFAFSR_ME_SHIFT)
11 #define SFAFSR_PRIV (_AC(1,UL) << SFAFSR_PRIV_SHIFT)
13 #define SFAFSR_ISAP (_AC(1,UL) << SFAFSR_ISAP_SHIFT)
15 #define SFAFSR_ETP (_AC(1,UL) << SFAFSR_ETP_SHIFT)
17 #define SFAFSR_IVUE (_AC(1,UL) << SFAFSR_IVUE_SHIFT)
19 #define SFAFSR_TO (_AC(1,UL) << SFAFSR_TO_SHIFT)
21 #define SFAFSR_BERR (_AC(1,UL) << SFAFSR_BERR_SHIFT)
23 #define SFAFSR_LDP (_AC(1,UL) << SFAFSR_LDP_SHIFT)
25 #define SFAFSR_CP (_AC(1,UL) << SFAFSR_CP_SHIFT)
27 #define SFAFSR_WP (_AC(
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H A Dpgtable_64.h37 #define TLBTEMP_BASE _AC(0x0000000006000000,UL)
38 #define TSBMAP_8K_BASE _AC(0x0000000008000000,UL)
39 #define TSBMAP_4M_BASE _AC(0x0000000008400000,UL)
40 #define MODULES_VADDR _AC(0x0000000010000000,UL)
41 #define MODULES_LEN _AC(0x00000000e0000000,UL)
42 #define MODULES_END _AC(0x00000000f0000000,UL)
43 #define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL)
44 #define HI_OBP_ADDRESS _AC(0x0000000100000000,UL)
45 #define VMALLOC_START _AC(0x0000000100000000,UL)
52 #define PMD_SIZE (_AC(
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H A Dlsu.h8 #define LSU_CONTROL_PM _AC(0x000001fe00000000,UL) /* Phys-watchpoint byte mask*/
9 #define LSU_CONTROL_VM _AC(0x00000001fe000000,UL) /* Virt-watchpoint byte mask*/
10 #define LSU_CONTROL_PR _AC(0x0000000001000000,UL) /* Phys-rd watchpoint enable*/
11 #define LSU_CONTROL_PW _AC(0x0000000000800000,UL) /* Phys-wr watchpoint enable*/
12 #define LSU_CONTROL_VR _AC(0x0000000000400000,UL) /* Virt-rd watchpoint enable*/
13 #define LSU_CONTROL_VW _AC(0x0000000000200000,UL) /* Virt-wr watchpoint enable*/
14 #define LSU_CONTROL_FM _AC(0x00000000000ffff0,UL) /* Parity mask enables. */
15 #define LSU_CONTROL_DM _AC(0x0000000000000008,UL) /* Data MMU enable. */
16 #define LSU_CONTROL_IM _AC(0x0000000000000004,UL) /* Instruction MMU enable. */
17 #define LSU_CONTROL_DC _AC(
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H A Dmmu_64.h11 #define TAG_CONTEXT_BITS ((_AC(1,UL) << CTX_NR_BITS) - _AC(1,UL))
22 #define CTX_PGSZ_8KB _AC(0x0,UL)
23 #define CTX_PGSZ_64KB _AC(0x1,UL)
24 #define CTX_PGSZ_512KB _AC(0x2,UL)
25 #define CTX_PGSZ_4MB _AC(0x3,UL)
26 #define CTX_PGSZ_BITS _AC(0x7,UL)
/kernel/linux/linux-6.6/arch/riscv/include/asm/
H A Dcsr.h13 #define SR_SIE _AC(0x00000002, UL) /* Supervisor Interrupt Enable */
14 #define SR_MIE _AC(0x00000008, UL) /* Machine Interrupt Enable */
15 #define SR_SPIE _AC(0x00000020, UL) /* Previous Supervisor IE */
16 #define SR_MPIE _AC(0x00000080, UL) /* Previous Machine IE */
17 #define SR_SPP _AC(0x00000100, UL) /* Previously Supervisor */
18 #define SR_MPP _AC(0x00001800, UL) /* Previously Machine */
19 #define SR_SUM _AC(0x00040000, UL) /* Supervisor User Memory Access */
21 #define SR_FS _AC(0x00006000, UL) /* Floating-point Status */
22 #define SR_FS_OFF _AC(0x00000000, UL)
23 #define SR_FS_INITIAL _AC(
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/kernel/linux/linux-6.6/arch/s390/include/uapi/asm/
H A Dptrace.h173 #define PSW_MASK_PER _AC(0x40000000, UL)
174 #define PSW_MASK_DAT _AC(0x04000000, UL)
175 #define PSW_MASK_IO _AC(0x02000000, UL)
176 #define PSW_MASK_EXT _AC(0x01000000, UL)
177 #define PSW_MASK_KEY _AC(0x00F00000, UL)
178 #define PSW_MASK_BASE _AC(0x00080000, UL) /* always one */
179 #define PSW_MASK_MCHECK _AC(0x00040000, UL)
180 #define PSW_MASK_WAIT _AC(0x00020000, UL)
181 #define PSW_MASK_PSTATE _AC(0x00010000, UL)
182 #define PSW_MASK_ASC _AC(
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/kernel/linux/linux-5.10/arch/riscv/include/asm/
H A Dcsr.h13 #define SR_SIE _AC(0x00000002, UL) /* Supervisor Interrupt Enable */
14 #define SR_MIE _AC(0x00000008, UL) /* Machine Interrupt Enable */
15 #define SR_SPIE _AC(0x00000020, UL) /* Previous Supervisor IE */
16 #define SR_MPIE _AC(0x00000080, UL) /* Previous Machine IE */
17 #define SR_SPP _AC(0x00000100, UL) /* Previously Supervisor */
18 #define SR_MPP _AC(0x00001800, UL) /* Previously Machine */
19 #define SR_SUM _AC(0x00040000, UL) /* Supervisor User Memory Access */
21 #define SR_FS _AC(0x00006000, UL) /* Floating-point Status */
22 #define SR_FS_OFF _AC(0x00000000, UL)
23 #define SR_FS_INITIAL _AC(
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/kernel/linux/linux-5.10/arch/mips/include/asm/mach-generic/
H A Dspaces.h28 # define PHYS_OFFSET _AC(0, UL)
34 #define CAC_BASE _AC(0x40000000, UL)
36 #define CAC_BASE _AC(0x80000000, UL)
39 #define IO_BASE _AC(0xa0000000, UL)
42 #define UNCAC_BASE _AC(0xa0000000, UL)
47 #define MAP_BASE _AC(0x60000000, UL)
49 #define MAP_BASE _AC(0xc0000000, UL)
57 #define HIGHMEM_START _AC(0x20000000, UL)
69 #define IO_BASE _AC(0x9000000000000000, UL)
73 #define UNCAC_BASE _AC(
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/kernel/linux/linux-6.6/arch/s390/include/asm/
H A Dptrace.h26 #define PSW32_MASK_PER _AC(0x40000000, UL)
27 #define PSW32_MASK_DAT _AC(0x04000000, UL)
28 #define PSW32_MASK_IO _AC(0x02000000, UL)
29 #define PSW32_MASK_EXT _AC(0x01000000, UL)
30 #define PSW32_MASK_KEY _AC(0x00F00000, UL)
31 #define PSW32_MASK_BASE _AC(0x00080000, UL) /* Always one */
32 #define PSW32_MASK_MCHECK _AC(0x00040000, UL)
33 #define PSW32_MASK_WAIT _AC(0x00020000, UL)
34 #define PSW32_MASK_PSTATE _AC(0x00010000, UL)
35 #define PSW32_MASK_ASC _AC(
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/kernel/linux/linux-6.6/arch/mips/include/asm/mach-generic/
H A Dspaces.h28 # define PHYS_OFFSET _AC(0, UL)
33 #define CAC_BASE _AC(0x80000000, UL)
35 #define IO_BASE _AC(0xa0000000, UL)
38 #define UNCAC_BASE _AC(0xa0000000, UL)
42 #define MAP_BASE _AC(0xc0000000, UL)
49 #define HIGHMEM_START _AC(0x20000000, UL)
61 #define IO_BASE _AC(0x9000000000000000, UL)
65 #define UNCAC_BASE _AC(0x9000000000000000, UL)
69 #define MAP_BASE _AC(0xc000000000000000, UL)
78 #define HIGHMEM_START (_AC(
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/kernel/linux/linux-5.10/arch/x86/include/asm/
H A Dpgtable_64_types.h64 #define P4D_SIZE (_AC(1, UL) << P4D_SHIFT)
98 #define PMD_SIZE (_AC(1, UL) << PMD_SHIFT)
100 #define PUD_SIZE (_AC(1, UL) << PUD_SHIFT)
102 #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
146 #define MODULES_END _AC(0xffffffffff000000, UL)
149 #define ESPFIX_PGD_ENTRY _AC(-2, UL)
152 #define CPU_ENTRY_AREA_PGD _AC(-4, UL)
155 #define EFI_VA_START ( -4 * (_AC(1, UL) << 30))
156 #define EFI_VA_END (-68 * (_AC(1, UL) << 30))
/kernel/linux/linux-6.6/arch/x86/include/asm/
H A Dpgtable_64_types.h65 #define P4D_SIZE (_AC(1, UL) << P4D_SHIFT)
99 #define PMD_SIZE (_AC(1, UL) << PMD_SHIFT)
101 #define PUD_SIZE (_AC(1, UL) << PUD_SHIFT)
103 #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
193 # define MODULES_END _AC(0xffffffffff000000, UL)
195 # define MODULES_END _AC(0xfffffffffe000000, UL)
199 #define ESPFIX_PGD_ENTRY _AC(-2, UL)
202 #define CPU_ENTRY_AREA_PGD _AC(-4, UL)
205 #define EFI_VA_START ( -4 * (_AC(1, UL) << 30))
206 #define EFI_VA_END (-68 * (_AC(
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/kernel/linux/linux-6.6/include/linux/
H A Dsizes.h46 #define SZ_4G _AC(0x100000000, ULL)
47 #define SZ_8G _AC(0x200000000, ULL)
48 #define SZ_16G _AC(0x400000000, ULL)
49 #define SZ_32G _AC(0x800000000, ULL)
51 #define SZ_1T _AC(0x10000000000, ULL)
52 #define SZ_64T _AC(0x400000000000, ULL)
/kernel/linux/linux-5.10/arch/mips/include/asm/mach-ip27/
H A Dspaces.h21 #define HSPEC_BASE _AC(0x9000000000000000, UL)
22 #define IO_BASE _AC(0x9200000000000000, UL)
23 #define MSPEC_BASE _AC(0x9400000000000000, UL)
24 #define UNCAC_BASE _AC(0x9600000000000000, UL)
25 #define CAC_BASE _AC(0xa800000000000000, UL)
/kernel/linux/linux-6.6/arch/mips/include/asm/mach-ip27/
H A Dspaces.h21 #define HSPEC_BASE _AC(0x9000000000000000, UL)
22 #define IO_BASE _AC(0x9200000000000000, UL)
23 #define MSPEC_BASE _AC(0x9400000000000000, UL)
24 #define UNCAC_BASE _AC(0x9600000000000000, UL)
25 #define CAC_BASE _AC(0xa800000000000000, UL)
/kernel/linux/linux-5.10/arch/csky/include/asm/
H A Dmemory.h11 #define FIXADDR_TOP _AC(0xffffc000, UL)
12 #define PKMAP_BASE _AC(0xff800000, UL)
13 #define VMALLOC_START _AC(0xc0008000, UL)
22 #define FIXADDR_TCM _AC(FIXADDR_TOP - (TCM_NR_PAGES * PAGE_SIZE), UL)
/kernel/linux/patches/linux-6.6/prebuilts/usr/include/linux/
H A Dconst.h22 #define _AC(X,Y) X macro
26 #define _AC(X,Y) __AC(X, Y) macro
29 #define _UL(x) (_AC(x, UL))
30 #define _ULL(x) (_AC(x, ULL))

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