| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| H A D | dcn30_clk_mgr.c | 116 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].valid = true; in dcn3_build_wm_range_table()
117 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us = pstate_latency_us; in dcn3_build_wm_range_table()
118 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us = sr_exit_time_us; in dcn3_build_wm_range_table()
119 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_exit_time_us; in dcn3_build_wm_range_table()
120 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE; in dcn3_build_wm_range_table()
121 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = 0; in dcn3_build_wm_range_table()
122 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn3_build_wm_range_table()
123 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_uclk = min_uclk_mhz; in dcn3_build_wm_range_table()
124 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_uclk = 0xFFFF; in dcn3_build_wm_range_table()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | dcn30_fpu.c | 370 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].valid) { in dcn30_fpu_update_soc_for_wm_a()
373 context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn30_fpu_update_soc_for_wm_a()
374 context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us; in dcn30_fpu_update_soc_for_wm_a()
375 context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us; in dcn30_fpu_update_soc_for_wm_a()
413 context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn30_fpu_calculate_wm_and_dlg()
587 dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn30_fpu_calculate_wm_and_dlg()
739 base->bw_params->wm_table.nv_entries[WM_A].valid = true; in dcn3_fpu_build_wm_range_table()
740 base->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us = pstate_latency_us; in dcn3_fpu_build_wm_range_table()
741 base->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us = sr_exit_time_us; in dcn3_fpu_build_wm_range_table()
742 base->bw_params->wm_table.nv_entries[WM_A] in dcn3_fpu_build_wm_range_table()
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 456 if (dc->clk_mgr->bw_params->wm_table.entries[WM_A].valid) { in dcn31_update_soc_for_wm_a()
457 context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].pstate_latency_us; in dcn31_update_soc_for_wm_a()
458 context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_enter_plus_exit_time_us; in dcn31_update_soc_for_wm_a()
459 context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_exit_time_us; in dcn31_update_soc_for_wm_a()
467 if (dc->clk_mgr->bw_params->wm_table.entries[WM_A].valid) { in dcn315_update_soc_for_wm_a()
472 context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.entries[WM_A].pstate_latency_us; in dcn315_update_soc_for_wm_a()
474 dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_enter_plus_exit_time_us; in dcn315_update_soc_for_wm_a()
476 dc->clk_mgr->bw_params->wm_table.entries[WM_A].sr_exit_time_us; in dcn315_update_soc_for_wm_a()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| H A D | rn_clk_mgr.c | 474 ranges->writer_wm_sets[0].wm_inst = WM_A; in build_watermark_ranges()
587 .wm_inst = WM_A,
624 .wm_inst = WM_A,
661 .wm_inst = WM_A,
698 .wm_inst = WM_A,
735 .wm_inst = WM_A,
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| H A D | dcn301_fpu.c | 221 .wm_inst = WM_A,
258 .wm_inst = WM_A,
448 table_entry = &bw_params->wm_table.entries[WM_A]; in dcn301_calculate_wm_and_dlg_fp()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | clk_mgr.h | 37 #define WM_A 0 macro
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| H A D | dcn316_clk_mgr.c | 263 .wm_inst = WM_A,
300 .wm_inst = WM_A,
386 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A; in dcn316_build_watermark_ranges()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | clk_mgr.h | 37 #define WM_A 0 macro
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 198 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].valid = true; in dcn32_build_wm_range_table_fpu()
199 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us = pstate_latency_us; in dcn32_build_wm_range_table_fpu()
200 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.fclk_change_latency_us = fclk_change_latency_us; in dcn32_build_wm_range_table_fpu()
201 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us = sr_exit_time_us; in dcn32_build_wm_range_table_fpu()
202 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_exit_time_us; in dcn32_build_wm_range_table_fpu()
203 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE; in dcn32_build_wm_range_table_fpu()
204 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = min_dcfclk_mhz; in dcn32_build_wm_range_table_fpu()
205 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn32_build_wm_range_table_fpu()
206 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_uclk = min_uclk_mhz; in dcn32_build_wm_range_table_fpu()
207 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A] in dcn32_build_wm_range_table_fpu()
[all...] |
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| H A D | dcn315_clk_mgr.c | 298 .wm_inst = WM_A,
335 .wm_inst = WM_A,
421 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A; in dcn315_build_watermark_ranges()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| H A D | dcn314_clk_mgr.c | 361 .wm_inst = WM_A,
398 .wm_inst = WM_A,
484 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A; in dcn314_build_watermark_ranges()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| H A D | dcn31_clk_mgr.c | 346 .wm_inst = WM_A,
383 .wm_inst = WM_A,
469 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A; in dcn31_build_watermark_ranges()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 768 .wm_inst = WM_A,
805 .wm_inst = WM_A,
842 .wm_inst = WM_A,
879 .wm_inst = WM_A,
916 .wm_inst = WM_A,
953 .wm_inst = WM_A,
2308 table_entry = &bw_params->wm_table.entries[WM_A]; in dcn21_calculate_wm()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/calcs/ |
| H A D | dcn_calcs.c | 43 #define WM_A 0 macro
1572 ranges.reader_wm_sets[0].wm_inst = WM_A; in dcn_bw_notify_pplib_of_wm_ranges()
1577 ranges.writer_wm_sets[0].wm_inst = WM_A; in dcn_bw_notify_pplib_of_wm_ranges()
1584 ranges.reader_wm_sets[0].wm_inst = WM_A; in dcn_bw_notify_pplib_of_wm_ranges()
1589 ranges.writer_wm_sets[0].wm_inst = WM_A; in dcn_bw_notify_pplib_of_wm_ranges()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| H A D | dcn_calcs.c | 43 #define WM_A 0 macro
1525 ranges.reader_wm_sets[0].wm_inst = WM_A; in dcn_bw_notify_pplib_of_wm_ranges()
1530 ranges.writer_wm_sets[0].wm_inst = WM_A; in dcn_bw_notify_pplib_of_wm_ranges()
1537 ranges.reader_wm_sets[0].wm_inst = WM_A; in dcn_bw_notify_pplib_of_wm_ranges()
1542 ranges.writer_wm_sets[0].wm_inst = WM_A; in dcn_bw_notify_pplib_of_wm_ranges()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_resource.c | 2326 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].valid) { in dcn30_calculate_wm_and_dlg_fp()
2327 context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn30_calculate_wm_and_dlg_fp()
2328 context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us; in dcn30_calculate_wm_and_dlg_fp()
2329 context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us; in dcn30_calculate_wm_and_dlg_fp()
2370 dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us; in dcn30_calculate_wm_and_dlg_fp()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| H A D | rn_clk_mgr.c | 503 ranges->writer_wm_sets[0].wm_inst = WM_A; in build_watermark_ranges()
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| H A D | vg_clk_mgr.c | 434 table->WatermarkRow[WM_SOCCLK][0].WmSetting = WM_A; in vg_build_watermark_ranges()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn21/ |
| H A D | dcn21_resource.c | 1165 table_entry = &bw_params->wm_table.entries[WM_A]; in dcn21_calculate_wm()
|