| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfxhub_v1_0.c | 223 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v1_0_enable_system_domain()
224 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, in gfxhub_v1_0_enable_system_domain()
226 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, PAGE_TABLE_BLOCK_SIZE, in gfxhub_v1_0_enable_system_domain()
228 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in gfxhub_v1_0_enable_system_domain()
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| H A D | gfxhub_v1_2.c | 277 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v1_2_xcc_enable_system_domain()
278 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, in gfxhub_v1_2_xcc_enable_system_domain()
280 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, PAGE_TABLE_BLOCK_SIZE, in gfxhub_v1_2_xcc_enable_system_domain()
282 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in gfxhub_v1_2_xcc_enable_system_domain()
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| H A D | mmhub_v1_8.c | 285 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in mmhub_v1_8_enable_system_domain()
286 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, in mmhub_v1_8_enable_system_domain()
289 VM_CONTEXT0_CNTL, PAGE_TABLE_BLOCK_SIZE, in mmhub_v1_8_enable_system_domain()
291 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in mmhub_v1_8_enable_system_domain()
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| H A D | mmhub_v1_0.c | 204 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in mmhub_v1_0_enable_system_domain()
205 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, 0); in mmhub_v1_0_enable_system_domain()
206 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in mmhub_v1_0_enable_system_domain()
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| H A D | mmhub_v1_7.c | 231 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in mmhub_v1_7_enable_system_domain()
232 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, in mmhub_v1_7_enable_system_domain()
234 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, PAGE_TABLE_BLOCK_SIZE, in mmhub_v1_7_enable_system_domain()
236 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in mmhub_v1_7_enable_system_domain()
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| H A D | gmc_v7_0.c | 654 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gmc_v7_0_gart_enable()
655 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, 0); in gmc_v7_0_gart_enable()
656 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1); in gmc_v7_0_gart_enable()
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| H A D | gmc_v8_0.c | 885 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gmc_v8_0_gart_enable()
886 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, 0); in gmc_v8_0_gart_enable()
887 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1); in gmc_v8_0_gart_enable()
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| H A D | sid.h | 393 #define VM_CONTEXT0_CNTL 0x504 macro
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfxhub_v1_0.c | 184 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gfxhub_v1_0_enable_system_domain()
185 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, 0); in gfxhub_v1_0_enable_system_domain()
186 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in gfxhub_v1_0_enable_system_domain()
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| H A D | mmhub_v1_0.c | 204 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in mmhub_v1_0_enable_system_domain()
205 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, 0); in mmhub_v1_0_enable_system_domain()
206 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in mmhub_v1_0_enable_system_domain()
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| H A D | gmc_v7_0.c | 660 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gmc_v7_0_gart_enable()
661 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, 0); in gmc_v7_0_gart_enable()
662 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1); in gmc_v7_0_gart_enable()
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| H A D | gmc_v8_0.c | 909 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1); in gmc_v8_0_gart_enable()
910 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, 0); in gmc_v8_0_gart_enable()
911 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, RANGE_PROTECTION_FAULT_ENABLE_DEFAULT, 1); in gmc_v8_0_gart_enable()
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| H A D | sid.h | 393 #define VM_CONTEXT0_CNTL 0x504 macro
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| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| H A D | rv770.c | 932 WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | in rv770_pcie_gart_enable()
937 WREG32(VM_CONTEXT0_CNTL + (i * 4), 0); in rv770_pcie_gart_enable()
954 WREG32(VM_CONTEXT0_CNTL + (i * 4), 0); in rv770_pcie_gart_disable()
1005 WREG32(VM_CONTEXT0_CNTL + (i * 4), 0); in rv770_agp_enable()
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| H A D | rv770d.h | 634 #define VM_CONTEXT0_CNTL 0x1410 macro
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| H A D | r600.c | 1172 WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | in r600_pcie_gart_enable()
1177 WREG32(VM_CONTEXT0_CNTL + (i * 4), 0); in r600_pcie_gart_enable()
1194 WREG32(VM_CONTEXT0_CNTL + (i * 4), 0); in r600_pcie_gart_disable()
1260 WREG32(VM_CONTEXT0_CNTL + (i * 4), 0); in r600_agp_enable()
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| H A D | ni.c | 1311 WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | in cayman_pcie_gart_enable()
1368 WREG32(VM_CONTEXT0_CNTL, 0); in cayman_pcie_gart_disable()
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| H A D | nid.h | 127 #define VM_CONTEXT0_CNTL 0x1410 macro
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| H A D | cikd.h | 510 #define VM_CONTEXT0_CNTL 0x1410 macro
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| H A D | sid.h | 392 #define VM_CONTEXT0_CNTL 0x1410 macro
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| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
| H A D | rv770.c | 929 WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | in rv770_pcie_gart_enable()
934 WREG32(VM_CONTEXT0_CNTL + (i * 4), 0); in rv770_pcie_gart_enable()
951 WREG32(VM_CONTEXT0_CNTL + (i * 4), 0); in rv770_pcie_gart_disable()
1002 WREG32(VM_CONTEXT0_CNTL + (i * 4), 0); in rv770_agp_enable()
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| H A D | rv770d.h | 634 #define VM_CONTEXT0_CNTL 0x1410 macro
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| H A D | r600.c | 1171 WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | in r600_pcie_gart_enable()
1176 WREG32(VM_CONTEXT0_CNTL + (i * 4), 0); in r600_pcie_gart_enable()
1193 WREG32(VM_CONTEXT0_CNTL + (i * 4), 0); in r600_pcie_gart_disable()
1259 WREG32(VM_CONTEXT0_CNTL + (i * 4), 0); in r600_agp_enable()
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| H A D | ni.c | 1298 WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) | in cayman_pcie_gart_enable()
1355 WREG32(VM_CONTEXT0_CNTL, 0); in cayman_pcie_gart_disable()
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| H A D | nid.h | 127 #define VM_CONTEXT0_CNTL 0x1410 macro
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