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Searched refs:UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK (Results 1 - 15 of 15) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v2_0.c898 UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK, in vcn_v2_0_start_dpg_mode()
899 ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v2_0_start_dpg_mode()
927 0, ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v2_0_start_dpg_mode()
1231 UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK, in vcn_v2_0_pause_dpg_mode()
1232 ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v2_0_pause_dpg_mode()
1260 0, ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v2_0_pause_dpg_mode()
H A Dvcn_v3_0.c1009 UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK, in vcn_v3_0_start_dpg_mode() local
1010 ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v3_0_start_dpg_mode()
1036 0, ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v3_0_start_dpg_mode()
1566 UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK, in vcn_v3_0_pause_dpg_mode() local
1567 ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v3_0_pause_dpg_mode()
1588 0, ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v3_0_pause_dpg_mode()
H A Dvcn_v2_5.c881 UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK, in vcn_v2_5_start_dpg_mode() local
882 ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v2_5_start_dpg_mode()
910 0, ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v2_5_start_dpg_mode()
1432 UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK, in vcn_v2_5_pause_dpg_mode() local
1433 ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v2_5_pause_dpg_mode()
1458 0, ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v2_5_pause_dpg_mode()
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v2_0.c897 UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK, in vcn_v2_0_start_dpg_mode()
898 ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v2_0_start_dpg_mode()
926 0, ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v2_0_start_dpg_mode()
1232 UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK, in vcn_v2_0_pause_dpg_mode()
1233 ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v2_0_pause_dpg_mode()
1261 0, ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v2_0_pause_dpg_mode()
H A Dvcn_v2_5.c929 UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK, in vcn_v2_5_start_dpg_mode() local
930 ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v2_5_start_dpg_mode()
958 0, ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v2_5_start_dpg_mode()
1480 UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK, in vcn_v2_5_pause_dpg_mode() local
1481 ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v2_5_pause_dpg_mode()
1506 0, ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v2_5_pause_dpg_mode()
H A Dvcn_v3_0.c1054 UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK, in vcn_v3_0_start_dpg_mode() local
1055 ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v3_0_start_dpg_mode()
1089 0, ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v3_0_start_dpg_mode()
1628 UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK, in vcn_v3_0_pause_dpg_mode() local
1629 ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v3_0_pause_dpg_mode()
1661 0, ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK); in vcn_v3_0_pause_dpg_mode()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_0_0_sh_mask.h1523 #define UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK 0x80000000L macro
H A Dvcn_2_5_sh_mask.h1526 #define UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK 0x80000000L macro
H A Dvcn_3_0_0_sh_mask.h2060 #define UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK 0x80000000L macro
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_0_0_sh_mask.h1523 #define UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK 0x80000000L macro
H A Dvcn_2_5_sh_mask.h1526 #define UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK 0x80000000L macro
H A Dvcn_3_0_0_sh_mask.h2060 #define UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK 0x80000000L macro
H A Dvcn_2_6_0_sh_mask.h2964 #define UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK 0x80000000L macro
H A Dvcn_4_0_0_sh_mask.h6353 #define UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK 0x80000000L macro
H A Dvcn_4_0_3_sh_mask.h7157 #define UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK 0x80000000L macro
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