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Searched refs:Ser1UTCR0 (Results 1 - 7 of 7) sorted by relevance

/kernel/linux/linux-5.10/arch/arm/mach-sa1100/
H A Dgeneric.c140 [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
H A Dsimpad.c140 if (port->mapbase == (u_int)&Ser1UTCR0) { in simpad_uart_pm()
/kernel/linux/linux-6.6/arch/arm/mach-sa1100/
H A Dgeneric.c137 [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
/kernel/linux/linux-5.10/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h195 * Ser1UTCR0 Serial port 1 Universal Asynchronous
276 #define Ser1UTCR0 _UTCR0 (1) /* Ser. port 1 UART Control Reg. 0 */ macro
302 #define _Ser1UTCR0 __PREG(Ser1UTCR0)
/kernel/linux/linux-6.6/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h195 * Ser1UTCR0 Serial port 1 Universal Asynchronous
276 #define Ser1UTCR0 _UTCR0 (1) /* Ser. port 1 UART Control Reg. 0 */ macro
302 #define _Ser1UTCR0 __PREG(Ser1UTCR0)
/kernel/linux/linux-5.10/drivers/tty/serial/
H A Dsa1100.c673 sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0; in sa1100_register_uart()
/kernel/linux/linux-6.6/drivers/tty/serial/
H A Dsa1100.c646 sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0; in sa1100_register_uart()

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