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Searched refs:SW (Results 1 - 25 of 34) sorted by relevance

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/kernel/linux/linux-5.10/arch/ia64/kernel/
H A Dentry.h25 #define SW(f) (IA64_SWITCH_STACK_##f##_OFFSET) macro
43 .savesp ar.unat,SW(CALLER_UNAT)+16+(off); \
44 .savesp ar.fpsr,SW(AR_FPSR)+16+(off); \
45 .spillsp f2,SW(F2)+16+(off); .spillsp f3,SW(F3)+16+(off); \
46 .spillsp f4,SW(F4)+16+(off); .spillsp f5,SW(F5)+16+(off); \
47 .spillsp f16,SW(F16)+16+(off); .spillsp f17,SW(F17)+16+(off); \
48 .spillsp f18,SW(F1
[all...]
H A Dentry.S246 adds r14=SW(R4)+16,sp
256 adds r15=SW(R5)+16,sp
260 add r14=SW(R4)+16,sp
262 st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0
270 adds r15=SW(R5)+16,sp
273 st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5
275 add r2=SW(F2)+16,sp // r2 = &sw->f2
277 st8.spill [r14]=r6,SW(B
[all...]
H A Dmca_asm.S567 add temp1=SW(F2), regs
568 add temp2=SW(F3), regs
603 stf.spill [temp1]=f30,SW(B2)-SW(F30)
604 stf.spill [temp2]=f31,SW(B3)-SW(F31)
613 st8 [temp1]=temp3,SW(AR_LC)-SW(B4) // save b4
726 add temp1=SW(F2), regs
727 add temp2=SW(F
[all...]
H A Dunwind.c2256 unw.sw_off[unw.preg_index[UNW_REG_PRI_UNAT_GR]] = SW(CALLER_UNAT); in unw_init()
2257 unw.sw_off[unw.preg_index[UNW_REG_BSPSTORE]] = SW(AR_BSPSTORE); in unw_init()
2258 unw.sw_off[unw.preg_index[UNW_REG_PFS]] = SW(AR_PFS); in unw_init()
2259 unw.sw_off[unw.preg_index[UNW_REG_RP]] = SW(B0); in unw_init()
2260 unw.sw_off[unw.preg_index[UNW_REG_UNAT]] = SW(CALLER_UNAT); in unw_init()
2261 unw.sw_off[unw.preg_index[UNW_REG_PR]] = SW(PR); in unw_init()
2262 unw.sw_off[unw.preg_index[UNW_REG_LC]] = SW(AR_LC); in unw_init()
2263 unw.sw_off[unw.preg_index[UNW_REG_FPSR]] = SW(AR_FPSR); in unw_init()
2264 for (i = UNW_REG_R4, off = SW(R4); i <= UNW_REG_R7; ++i, off += 8) in unw_init()
2266 for (i = UNW_REG_B1, off = SW(B in unw_init()
[all...]
/kernel/linux/linux-6.6/arch/ia64/kernel/
H A Dentry.h25 #define SW(f) (IA64_SWITCH_STACK_##f##_OFFSET) macro
43 .savesp ar.unat,SW(CALLER_UNAT)+16+(off); \
44 .savesp ar.fpsr,SW(AR_FPSR)+16+(off); \
45 .spillsp f2,SW(F2)+16+(off); .spillsp f3,SW(F3)+16+(off); \
46 .spillsp f4,SW(F4)+16+(off); .spillsp f5,SW(F5)+16+(off); \
47 .spillsp f16,SW(F16)+16+(off); .spillsp f17,SW(F17)+16+(off); \
48 .spillsp f18,SW(F1
[all...]
H A Dentry.S245 adds r14=SW(R4)+16,sp
255 adds r15=SW(R5)+16,sp
259 add r14=SW(R4)+16,sp
261 st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0
269 adds r15=SW(R5)+16,sp
272 st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5
274 add r2=SW(F2)+16,sp // r2 = &sw->f2
276 st8.spill [r14]=r6,SW(B
[all...]
H A Dmca_asm.S567 add temp1=SW(F2), regs
568 add temp2=SW(F3), regs
603 stf.spill [temp1]=f30,SW(B2)-SW(F30)
604 stf.spill [temp2]=f31,SW(B3)-SW(F31)
613 st8 [temp1]=temp3,SW(AR_LC)-SW(B4) // save b4
726 add temp1=SW(F2), regs
727 add temp2=SW(F
[all...]
H A Dunwind.c2256 unw.sw_off[unw.preg_index[UNW_REG_PRI_UNAT_GR]] = SW(CALLER_UNAT); in unw_init()
2257 unw.sw_off[unw.preg_index[UNW_REG_BSPSTORE]] = SW(AR_BSPSTORE); in unw_init()
2258 unw.sw_off[unw.preg_index[UNW_REG_PFS]] = SW(AR_PFS); in unw_init()
2259 unw.sw_off[unw.preg_index[UNW_REG_RP]] = SW(B0); in unw_init()
2260 unw.sw_off[unw.preg_index[UNW_REG_UNAT]] = SW(CALLER_UNAT); in unw_init()
2261 unw.sw_off[unw.preg_index[UNW_REG_PR]] = SW(PR); in unw_init()
2262 unw.sw_off[unw.preg_index[UNW_REG_LC]] = SW(AR_LC); in unw_init()
2263 unw.sw_off[unw.preg_index[UNW_REG_FPSR]] = SW(AR_FPSR); in unw_init()
2264 for (i = UNW_REG_R4, off = SW(R4); i <= UNW_REG_R7; ++i, off += 8) in unw_init()
2266 for (i = UNW_REG_B1, off = SW(B in unw_init()
[all...]
/kernel/linux/linux-5.10/arch/parisc/include/asm/
H A Dfloppy.h28 #define SW fd_routine[use_virtual_dma&1] macro
40 #define fd_get_dma_residue() SW._get_dma_residue(FLOPPY_DMA)
41 #define fd_dma_mem_alloc(size) SW._dma_mem_alloc(size)
42 #define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
/kernel/linux/linux-6.6/arch/parisc/include/asm/
H A Dfloppy.h28 #define SW fd_routine[use_virtual_dma&1] macro
40 #define fd_get_dma_residue() SW._get_dma_residue(FLOPPY_DMA)
41 #define fd_dma_mem_alloc(size) SW._dma_mem_alloc(size)
42 #define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
/kernel/linux/linux-5.10/arch/x86/include/asm/
H A Dfloppy.h30 #define SW fd_routine[use_virtual_dma & 1] macro
42 #define fd_get_dma_residue() SW._get_dma_residue(FLOPPY_DMA)
43 #define fd_dma_mem_alloc(size) SW._dma_mem_alloc(size)
44 #define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
/kernel/linux/linux-6.6/arch/x86/include/asm/
H A Dfloppy.h30 #define SW fd_routine[use_virtual_dma & 1] macro
42 #define fd_get_dma_residue() SW._get_dma_residue(FLOPPY_DMA)
43 #define fd_dma_mem_alloc(size) SW._dma_mem_alloc(size)
44 #define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
/kernel/linux/linux-5.10/drivers/clk/bcm/
H A Dclk-kona.h57 #define gate_is_sw_controllable(gate) FLAG_TEST(gate, GATE, SW)
140 * SW means the state of this gate can be software controlled
149 #define BCM_CLK_GATE_FLAGS_SW_MANAGED ((u32)1 << 4) /* SW now in control */
165 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \
177 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \
188 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \
198 .flags = FLAG(GATE, SW)|FLAG(GATE, SW_MANAGED)| \
/kernel/linux/linux-6.6/drivers/clk/bcm/
H A Dclk-kona.h49 #define gate_is_sw_controllable(gate) FLAG_TEST(gate, GATE, SW)
132 * SW means the state of this gate can be software controlled
141 #define BCM_CLK_GATE_FLAGS_SW_MANAGED ((u32)1 << 4) /* SW now in control */
157 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \
169 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \
180 .flags = FLAG(GATE, HW)|FLAG(GATE, SW)| \
190 .flags = FLAG(GATE, SW)|FLAG(GATE, SW_MANAGED)| \
/kernel/linux/linux-5.10/arch/powerpc/kernel/
H A Dalign.c41 #define SW 0x20 /* byte swap */ macro
232 if (flags & SW) { in emulate_spe()
/kernel/linux/linux-6.6/arch/powerpc/kernel/
H A Dalign.c41 #define SW 0x20 /* byte swap */ macro
227 if (flags & SW) { in emulate_spe()
/kernel/linux/linux-5.10/drivers/regulator/
H A Dmc13xxx.h104 MC13xxx_DEFINE(SW, _name, _node, _reg, _vsel_reg, _voltages, ops)
H A Daxp20x-regulator.c834 AXP_DESC_SW(AXP806, SW, "sw", "swin",
915 AXP_DESC_SW(AXP809, SW, "sw", "swin",
1000 AXP_DESC_SW(AXP813, SW, "sw", "swin",
/kernel/linux/linux-6.6/drivers/regulator/
H A Dmc13xxx.h104 MC13xxx_DEFINE(SW, _name, _node, _reg, _vsel_reg, _voltages, ops)
H A Daxp20x-regulator.c948 AXP_DESC_SW(AXP806, SW, "sw", "swin",
1029 AXP_DESC_SW(AXP809, SW, "sw", "swin",
1114 AXP_DESC_SW(AXP813, SW, "sw", "swin",
1210 AXP_DESC_SW(AXP15060, SW, "sw", NULL,
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/device/
H A Duser.c79 case ENGINE_A(SW ); break; in nvkm_udevice_info_v1()
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dbase.c196 CASE(SW ); in nvkm_fifo_info()
/kernel/linux/linux-5.10/drivers/input/
H A Dinput.c1214 input_seq_print_bitmap(seq, "SW", dev->swbit, SW_MAX); in input_devices_seq_show()
1524 INPUT_DEV_CAP_ATTR(SW, sw);
1659 INPUT_ADD_HOTPLUG_BM_VAR("SW=", dev->swbit, SW_MAX); in input_dev_uevent()
2101 INPUT_CLEANSE_BITMASK(dev, SW, sw); in input_cleanse_bitmasks()
/kernel/linux/linux-6.6/drivers/input/
H A Dinput.c1233 input_seq_print_bitmap(seq, "SW", dev->swbit, SW_MAX); in input_devices_seq_show()
1580 INPUT_DEV_CAP_ATTR(SW, sw);
1715 INPUT_ADD_HOTPLUG_BM_VAR("SW=", dev->swbit, SW_MAX); in input_dev_uevent()
2210 INPUT_CLEANSE_BITMASK(dev, SW, sw); in input_cleanse_bitmasks()
/kernel/linux/linux-5.10/arch/mips/net/
H A Dbpf_jit.c334 emit_long_instr(ctx, SW, reg, offset, base); in emit_store_stack_reg()

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