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Searched refs:SMMU_PMCG_CNTENCLR0 (Results 1 - 2 of 2) sorted by relevance

/kernel/linux/linux-5.10/drivers/perf/
H A Darm_smmuv3_pmu.c64 #define SMMU_PMCG_CNTENCLR0 0xC20 macro
208 writeq(BIT(idx), smmu_pmu->reg_base + SMMU_PMCG_CNTENCLR0); in smmu_pmu_counter_disable()
737 smmu_pmu->reg_base + SMMU_PMCG_CNTENCLR0); in smmu_pmu_reset()
/kernel/linux/linux-6.6/drivers/perf/
H A Darm_smmuv3_pmu.c65 #define SMMU_PMCG_CNTENCLR0 0xC20 macro
229 writeq(BIT(idx), smmu_pmu->reg_base + SMMU_PMCG_CNTENCLR0); in smmu_pmu_counter_disable()
783 smmu_pmu->reg_base + SMMU_PMCG_CNTENCLR0); in smmu_pmu_reset()

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