| /kernel/linux/linux-5.10/arch/arm64/net/ |
| H A D | bpf_jit.h | 56 #define A64_LS_REG(Rt, Rn, Rm, size, type) \
57 aarch64_insn_gen_load_store_reg(Rt, Rn, Rm, \
149 #define A64_ADDSUB_SREG(sf, Rd, Rn, Rm, type) \
150 aarch64_insn_gen_add_sub_shifted_reg(Rd, Rn, Rm, 0, \
152 /* Rd = Rn OP Rm */
153 #define A64_ADD(sf, Rd, Rn, Rm) A64_ADDSUB_SREG(sf, Rd, Rn, Rm, ADD)
154 #define A64_SUB(sf, Rd, Rn, Rm) A64_ADDSUB_SREG(sf, Rd, Rn, Rm, SUB)
155 #define A64_SUBS(sf, Rd, Rn, Rm) A64_ADDSUB_SRE
[all...] |
| /kernel/linux/linux-6.6/arch/arm64/net/ |
| H A D | bpf_jit.h | 56 #define A64_LS_REG(Rt, Rn, Rm, size, type) \
57 aarch64_insn_gen_load_store_reg(Rt, Rn, Rm, \
212 #define A64_ADDSUB_SREG(sf, Rd, Rn, Rm, type) \
213 aarch64_insn_gen_add_sub_shifted_reg(Rd, Rn, Rm, 0, \
215 /* Rd = Rn OP Rm */
216 #define A64_ADD(sf, Rd, Rn, Rm) A64_ADDSUB_SREG(sf, Rd, Rn, Rm, ADD)
217 #define A64_SUB(sf, Rd, Rn, Rm) A64_ADDSUB_SREG(sf, Rd, Rn, Rm, SUB)
218 #define A64_SUBS(sf, Rd, Rn, Rm) A64_ADDSUB_SRE
[all...] |
| /kernel/linux/linux-5.10/arch/sh/math-emu/ |
| H A D | math.c | 52 #define Rm (regs->regs[m]) macro
160 READ(FRn, Rm + R0 + 4); in fmov_idx_reg()
162 READ(FRn, Rm + R0); in fmov_idx_reg()
164 READ(FRn, Rm + R0); in fmov_idx_reg()
176 READ(FRn, Rm + 4); in fmov_mem_reg()
178 READ(FRn, Rm); in fmov_mem_reg()
180 READ(FRn, Rm); in fmov_mem_reg()
192 READ(FRn, Rm + 4); in fmov_inc_reg()
194 READ(FRn, Rm); in fmov_inc_reg()
195 Rm in fmov_inc_reg()
[all...] |
| /kernel/linux/linux-6.6/arch/sh/math-emu/ |
| H A D | math.c | 52 #define Rm (regs->regs[m]) macro
160 MREAD(FRn, Rm + R0 + 4); in fmov_idx_reg()
162 MREAD(FRn, Rm + R0); in fmov_idx_reg()
164 MREAD(FRn, Rm + R0); in fmov_idx_reg()
176 MREAD(FRn, Rm + 4); in fmov_mem_reg()
178 MREAD(FRn, Rm); in fmov_mem_reg()
180 MREAD(FRn, Rm); in fmov_mem_reg()
192 MREAD(FRn, Rm + 4); in fmov_inc_reg()
194 MREAD(FRn, Rm); in fmov_inc_reg()
195 Rm in fmov_inc_reg()
[all...] |
| /kernel/linux/linux-5.10/arch/arm/mm/ |
| H A D | abort-lv4t.S | 91 and r9, r8, #0x00f @ get Rm / low nibble of immediate value
95 ldreq r6, [r2, r9, lsl #2] @ { load Rm value }
127 ldr r6, [r2, r7, lsl #2] @ Get register 'Rm'
|
| /kernel/linux/linux-6.6/arch/arm/mm/ |
| H A D | abort-lv4t.S | 91 and r9, r8, #0x00f @ get Rm / low nibble of immediate value
95 ldreq r6, [r2, r9, lsl #2] @ { load Rm value }
127 ldr r6, [r2, r7, lsl #2] @ Get register 'Rm'
|
| /kernel/linux/linux-5.10/arch/arm64/include/asm/ |
| H A D | insn.h | 480 enum aarch64_insn_register Rm,
|
| /kernel/linux/linux-5.10/arch/arm64/kernel/ |
| H A D | insn.c | 1670 enum aarch64_insn_register Rm, in aarch64_insn_gen_extr()
1698 return aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RM, insn, Rm); in aarch64_insn_gen_extr()
1669 aarch64_insn_gen_extr(enum aarch64_insn_variant variant, enum aarch64_insn_register Rm, enum aarch64_insn_register Rn, enum aarch64_insn_register Rd, u8 lsb) aarch64_insn_gen_extr() argument
|
| /kernel/linux/linux-6.6/arch/arm64/lib/ |
| H A D | insn.c | 1443 enum aarch64_insn_register Rm, in aarch64_insn_gen_extr()
1471 return aarch64_insn_encode_register(AARCH64_INSN_REGTYPE_RM, insn, Rm); in aarch64_insn_gen_extr()
1442 aarch64_insn_gen_extr(enum aarch64_insn_variant variant, enum aarch64_insn_register Rm, enum aarch64_insn_register Rn, enum aarch64_insn_register Rd, u8 lsb) aarch64_insn_gen_extr() argument
|
| /kernel/linux/linux-6.6/arch/arm64/include/asm/ |
| H A D | insn.h | 650 enum aarch64_insn_register Rm,
|