Searched refs:RVU_PF_VFFLR_INT_ENA_W1SX (Results 1 - 9 of 9) sorted by relevance
| /kernel/linux/linux-6.6/drivers/crypto/marvell/octeontx2/ |
| H A D | otx2_cptpf_main.c | 78 RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(num_vfs)); in cptpf_enable_vf_flr_me_intrs()
92 RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(num_vfs - 64)); in cptpf_enable_vf_flr_me_intrs()
169 RVU_PF_VFFLR_INT_ENA_W1SX(reg), BIT_ULL(vf)); in cptpf_flr_wq_handler()
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/marvell/octeontx2/nic/ |
| H A D | otx2_reg.h | 31 #define RVU_PF_VFFLR_INT_ENA_W1SX(a) (0x940 | (a) << 3) macro
|
| H A D | otx2_pf.c | 128 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(reg), BIT_ULL(vf)); in otx2_flr_handler()
245 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
255 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(1), in otx2_register_flr_me_intr()
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/marvell/octeontx2/nic/ |
| H A D | otx2_reg.h | 28 #define RVU_PF_VFFLR_INT_ENA_W1SX(a) (0x940 | (a) << 3) macro
|
| H A D | otx2_pf.c | 139 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(reg), BIT_ULL(vf)); in otx2_flr_handler()
256 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(numvfs)); in otx2_register_flr_me_intr()
266 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1SX(1), in otx2_register_flr_me_intr()
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/marvell/octeontx2/af/ |
| H A D | rvu.c | 2083 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(reg), BIT_ULL(vf)); in rvu_afvf_flr_handler()
2526 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(vfs)); in rvu_enable_afvf_intr()
2538 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(vfs - 64)); in rvu_enable_afvf_intr()
|
| H A D | rvu_reg.h | 87 #define RVU_PF_VFFLR_INT_ENA_W1SX(a) (0x940 | (a) << 3) macro
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/marvell/octeontx2/af/ |
| H A D | rvu.c | 2673 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(reg), BIT_ULL(vf)); in rvu_afvf_flr_handler()
3122 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(vfs)); in rvu_enable_afvf_intr()
3134 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(vfs - 64)); in rvu_enable_afvf_intr()
|
| H A D | rvu_reg.h | 94 #define RVU_PF_VFFLR_INT_ENA_W1SX(a) (0x940 | (a) << 3) macro
|
Completed in 21 milliseconds