Searched refs:RVU_PF_VFFLR_INT_ENA_W1CX (Results 1 - 9 of 9) sorted by relevance
| /kernel/linux/linux-6.6/drivers/crypto/marvell/octeontx2/ |
| H A D | otx2_cptpf_main.c | 107 RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(num_vfs)); in cptpf_disable_vf_flr_me_intrs()
121 RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(num_vfs - 64)); in cptpf_disable_vf_flr_me_intrs()
199 RVU_PF_VFFLR_INT_ENA_W1CX(reg), in cptpf_vf_flr_intr()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/marvell/octeontx2/nic/ |
| H A D | otx2_reg.h | 32 #define RVU_PF_VFFLR_INT_ENA_W1CX(a) (0x960 | (a) << 3) macro
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| H A D | otx2_pf.c | 77 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs)); in otx2_disable_flr_me_intr()
88 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in otx2_disable_flr_me_intr()
156 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(reg), in otx2_pf_flr_intr_handler()
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| /kernel/linux/linux-6.6/drivers/net/ethernet/marvell/octeontx2/nic/ |
| H A D | otx2_reg.h | 29 #define RVU_PF_VFFLR_INT_ENA_W1CX(a) (0x960 | (a) << 3) macro
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| H A D | otx2_pf.c | 88 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs)); in otx2_disable_flr_me_intr()
99 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in otx2_disable_flr_me_intr()
167 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(reg), in otx2_pf_flr_intr_handler()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/marvell/octeontx2/af/ |
| H A D | rvu.c | 2135 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(reg), BIT_ULL(vf)); in rvu_afvf_queue_flr_work()
2502 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs)); in rvu_disable_afvf_intr()
2509 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in rvu_disable_afvf_intr()
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| H A D | rvu_reg.h | 88 #define RVU_PF_VFFLR_INT_ENA_W1CX(a) (0x960 | (a) << 3) macro
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| /kernel/linux/linux-6.6/drivers/net/ethernet/marvell/octeontx2/af/ |
| H A D | rvu.c | 2723 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(reg), BIT_ULL(vf)); in rvu_afvf_queue_flr_work()
3098 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs)); in rvu_disable_afvf_intr()
3105 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in rvu_disable_afvf_intr()
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| H A D | rvu_reg.h | 95 #define RVU_PF_VFFLR_INT_ENA_W1CX(a) (0x960 | (a) << 3) macro
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