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Searched refs:RNG_CTL_LFSR (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/char/hw_random/
H A Dn2-drv.c52 * In normal operating mode (RNG_CTL_LFSR is set), the chip implements
63 * The standard setting is to have the mode bit (RNG_CTL_LFSR) set,
313 RNG_CTL_LFSR); in n2rng_control_default()
335 RNG_CTL_LFSR); in n2rng_control_default()
567 base3 = base | RNG_CTL_LFSR | in n2rng_control_selftest()
572 base3 = base | RNG_CTL_LFSR | in n2rng_control_selftest()
577 base3 = base | RNG_CTL_LFSR | in n2rng_control_selftest()
628 RNG_CTL_LFSR); in n2rng_control_configure_units()
633 RNG_CTL_LFSR); in n2rng_control_configure_units()
H A Dn2rng.h21 #define RNG_CTL_LFSR 0x0000000000000008ULL /* Use LFSR or plain shift */ macro
/kernel/linux/linux-6.6/drivers/char/hw_random/
H A Dn2-drv.c52 * In normal operating mode (RNG_CTL_LFSR is set), the chip implements
63 * The standard setting is to have the mode bit (RNG_CTL_LFSR) set,
313 RNG_CTL_LFSR); in n2rng_control_default()
335 RNG_CTL_LFSR); in n2rng_control_default()
567 base3 = base | RNG_CTL_LFSR | in n2rng_control_selftest()
572 base3 = base | RNG_CTL_LFSR | in n2rng_control_selftest()
577 base3 = base | RNG_CTL_LFSR | in n2rng_control_selftest()
628 RNG_CTL_LFSR); in n2rng_control_configure_units()
633 RNG_CTL_LFSR); in n2rng_control_configure_units()
H A Dn2rng.h21 #define RNG_CTL_LFSR 0x0000000000000008ULL /* Use LFSR or plain shift */ macro

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