| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/ |
| H A D | intel_ring_submission.c | 193 ENGINE_WRITE(engine, RING_CTL, 0); in stop_ring()
238 ENGINE_READ(engine, RING_CTL), in xcs_resume()
248 ENGINE_READ(engine, RING_CTL), in xcs_resume()
287 ENGINE_WRITE(engine, RING_CTL, RING_CTL_SIZE(ring->size) | RING_VALID); in xcs_resume()
291 RING_CTL(engine->mmio_base), in xcs_resume()
297 ENGINE_READ(engine, RING_CTL), in xcs_resume()
298 ENGINE_READ(engine, RING_CTL) & RING_VALID, in xcs_resume()
359 intel_uncore_write_fw(uncore, RING_CTL(base), 0); in reset_prepare()
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| H A D | intel_gt.c | 61 intel_uncore_write(uncore, RING_CTL(base), 0); in init_unused_ring()
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| H A D | intel_engine_cs.c | 1445 ENGINE_READ(engine, RING_CTL), in intel_engine_print_registers()
1446 ENGINE_READ(engine, RING_CTL) & (RING_WAIT | RING_WAIT_SEMAPHORE) ? " [waiting]" : ""); in intel_engine_print_registers()
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| H A D | selftest_lrc.c | 4906 i915_mmio_reg_offset(RING_CTL(engine->mmio_base)), in live_lrc_fixed()
4908 "RING_CTL" in live_lrc_fixed()
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| H A D | intel_lrc.c | 1237 pr_err("%s: context submitted with incorrect RING_CTL [%08x], expected %08x\n", in execlists_check_context()
2700 ENGINE_READ(engine, RING_CTL), in process_csb()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/ |
| H A D | intel_ring_submission.c | 182 ENGINE_WRITE_FW(engine, RING_CTL, 0); in stop_ring()
183 ENGINE_POSTING_READ(engine, RING_CTL); in stop_ring()
237 ENGINE_WRITE_FW(engine, RING_CTL, in xcs_resume()
242 RING_CTL(engine->mmio_base), in xcs_resume()
266 ENGINE_READ(engine, RING_CTL), in xcs_resume()
267 ENGINE_READ(engine, RING_CTL) & RING_VALID, in xcs_resume()
335 ENGINE_READ_FW(engine, RING_CTL), in reset_prepare()
344 ENGINE_READ_FW(engine, RING_CTL), in reset_prepare()
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| H A D | intel_engine_regs.h | 19 #define RING_CTL(base) _MMIO((base) + 0x3c) macro
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| H A D | intel_gt.c | 140 intel_uncore_write(uncore, RING_CTL(base), 0); in init_unused_ring()
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| H A D | intel_engine_cs.c | 2080 ENGINE_READ(engine, RING_CTL), in intel_engine_print_registers()
2081 ENGINE_READ(engine, RING_CTL) & (RING_WAIT | RING_WAIT_SEMAPHORE) ? " [waiting]" : ""); in intel_engine_print_registers()
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| H A D | selftest_lrc.c | 309 i915_mmio_reg_offset(RING_CTL(engine->mmio_base)), in live_lrc_fixed()
311 "RING_CTL" in live_lrc_fixed()
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| H A D | intel_execlists_submission.c | 1979 ENGINE_READ(engine, RING_CTL), in process_csb()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
| H A D | i915_pmu.c | 290 val = ENGINE_READ_FW(engine, RING_CTL); in engine_sample()
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| H A D | i915_gpu_error.c | 1163 ee->ctl = ENGINE_READ(engine, RING_CTL); in engine_record_registers()
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| H A D | i915_reg.h | 2511 #define RING_CTL(base) _MMIO((base) + 0x3c) macro
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/uc/ |
| H A D | intel_guc_capture.c | 69 { RING_CTL(0), 0, 0, "CTL" }, \
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/ |
| H A D | i915_pmu.c | 355 val = ENGINE_READ_FW(engine, RING_CTL); in engine_sample()
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| H A D | intel_gvt_mmio_table.c | 78 MMIO_RING_D(RING_CTL); in iterate_generic_mmio()
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| H A D | i915_gpu_error.c | 1286 ee->ctl = ENGINE_READ(engine, RING_CTL); in engine_record_registers()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/gvt/ |
| H A D | handlers.c | 2220 MMIO_RING_DFH(RING_CTL, D_ALL, 0, NULL, NULL); in init_generic_mmio_info()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/ |
| H A D | handlers.c | 1977 MMIO_RING_DFH(RING_CTL, D_ALL, 0, NULL, NULL); in init_generic_mmio_info()
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