Searched refs:REG_FPGA0_XA_RF_INT_OE (Results 1 - 11 of 11) sorted by relevance
| /kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtl8xxxu/ |
| H A D | rtl8xxxu_8192e.c | 1078 REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE, in rtl8192eu_phy_iqcalibrate()
1115 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_RF_INT_OE); in rtl8192eu_phy_iqcalibrate()
1117 rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, val32); in rtl8192eu_phy_iqcalibrate()
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| H A D | rtl8xxxu_regs.h | 872 #define REG_FPGA0_XA_RF_INT_OE 0x0860 /* RF Channel switch */ macro
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| H A D | rtl8xxxu_core.c | 2395 reg_int_oe = REG_FPGA0_XA_RF_INT_OE; in rtl8xxxu_init_phy_rf()
3134 REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE, in rtl8xxxu_phy_iqcalibrate()
3181 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_RF_INT_OE); in rtl8xxxu_phy_iqcalibrate()
3183 rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, val32); in rtl8xxxu_phy_iqcalibrate()
3966 rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, 0x66f60210); in rtl8xxxu_init_device()
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| H A D | rtl8xxxu_8723b.c | 902 REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE, in rtl8723bu_phy_iqcalibrate()
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| /kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtl8xxxu/ |
| H A D | rtl8xxxu_8188e.c | 790 REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE, in rtl8188eu_phy_iqcalibrate()
839 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_RF_INT_OE); in rtl8188eu_phy_iqcalibrate()
841 rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, val32); in rtl8188eu_phy_iqcalibrate()
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| H A D | rtl8xxxu_8192e.c | 1090 REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE, in rtl8192eu_phy_iqcalibrate()
1127 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_RF_INT_OE); in rtl8192eu_phy_iqcalibrate()
1129 rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, val32); in rtl8192eu_phy_iqcalibrate()
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| H A D | rtl8xxxu_regs.h | 915 #define REG_FPGA0_XA_RF_INT_OE 0x0860 /* RF Channel switch */ macro
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| H A D | rtl8xxxu_core.c | 2461 reg_int_oe = REG_FPGA0_XA_RF_INT_OE; in rtl8xxxu_init_phy_rf()
3223 REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE, in rtl8xxxu_phy_iqcalibrate()
3270 val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_RF_INT_OE); in rtl8xxxu_phy_iqcalibrate()
3272 rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, val32); in rtl8xxxu_phy_iqcalibrate()
4130 rtl8xxxu_write32(priv, REG_FPGA0_XA_RF_INT_OE, 0x66f60210); in rtl8xxxu_init_device()
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| H A D | rtl8xxxu_8188f.c | 1087 REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE, in rtl8188fu_phy_iqcalibrate()
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| H A D | rtl8xxxu_8723b.c | 934 REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE, in rtl8723bu_phy_iqcalibrate()
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| H A D | rtl8xxxu_8710b.c | 1295 REG_FPGA0_XAB_RF_SW_CTRL, REG_FPGA0_XA_RF_INT_OE, in rtl8710bu_phy_iqcalibrate()
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