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Searched refs:REG_DSI_28nm_8960_PHY_PLL_CTRL_8 (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/pll/
H A Ddsi_pll_28nm_8960.c143 val = pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8); in dsi_pll_28nm_clk_set_rate()
145 pll_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8, in dsi_pll_28nm_clk_set_rate()
310 val = pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8); in dsi_pll_28nm_enable_seq()
313 pll_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8, val); in dsi_pll_28nm_enable_seq()
348 pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8); in dsi_pll_28nm_save_state()
372 pll_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8, in dsi_pll_28nm_restore_state()
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/dsi/phy/
H A Ddsi_phy_28nm_8960.c126 val = dsi_phy_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8); in dsi_pll_28nm_clk_set_rate()
128 dsi_phy_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8, in dsi_pll_28nm_clk_set_rate()
202 val = dsi_phy_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8); in dsi_pll_28nm_vco_prepare()
205 dsi_phy_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8, val); in dsi_pll_28nm_vco_prepare()
354 dsi_phy_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8); in dsi_28nm_pll_save_state()
378 dsi_phy_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_8, in dsi_28nm_pll_restore_state()
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/dsi/
H A Ddsi_phy_28nm_8960.xml.h256 #define REG_DSI_28nm_8960_PHY_PLL_CTRL_8 0x00000020 macro
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/
H A Ddsi.xml.h931 #define REG_DSI_28nm_8960_PHY_PLL_CTRL_8 0x00000020 macro

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