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Searched refs:R0 (Results 1 - 25 of 143) sorted by relevance

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/kernel/linux/linux-5.10/arch/hexagon/kernel/
H A Dvm_entry.S37 memd(R0 + #_PT_R3130) = R31:30; \
38 { memw(R0 + #_PT_R2928) = R28; \
39 R31 = memw(R0 + #_PT_ER_VMPSP); }\
40 { memw(R0 + #(_PT_R2928 + 4)) = R31; \
42 { memd(R0 + #_PT_R2726) = R27:26; \
44 memd(R0 + #_PT_R2524) = R25:24; \
45 memd(R0 + #_PT_R2322) = R23:22; \
46 memd(R0 + #_PT_R2120) = R21:20; \
47 memd(R0 + #_PT_R1918) = R19:18; \
48 memd(R0
215 R0 = R29; \\ global() define
232 R0 = usr; \\ global() define
236 R0 = setbit(R0, #16); \\ global() define
246 R0 = R29; \\ global() define
274 R0 = #VM_INT_DISABLE global() define
280 R0 = memw(R29 + #_PT_ER_VMEST); global() define
287 R0 = #VM_INT_DISABLE; global() define
301 R0 = R29; /* regs should still be at top of stack */ global() define
308 R0 = #VM_INT_DISABLE; global() define
331 R0 = R29 global() define
370 R0 = #VM_INT_DISABLE; global() define
374 R0 = R25; global() define
379 R0 = #VM_INT_DISABLE; global() define
[all...]
/kernel/linux/linux-6.6/arch/hexagon/kernel/
H A Dvm_entry.S37 memd(R0 + #_PT_R3130) = R31:30; \
38 { memw(R0 + #_PT_R2928) = R28; \
39 R31 = memw(R0 + #_PT_ER_VMPSP); }\
40 { memw(R0 + #(_PT_R2928 + 4)) = R31; \
42 { memd(R0 + #_PT_R2726) = R27:26; \
44 memd(R0 + #_PT_R2524) = R25:24; \
45 memd(R0 + #_PT_R2322) = R23:22; \
46 memd(R0 + #_PT_R2120) = R21:20; \
47 memd(R0 + #_PT_R1918) = R19:18; \
48 memd(R0
215 R0 = R29; \\ global() define
232 R0 = usr; \\ global() define
236 R0 = setbit(R0, #16); \\ global() define
246 R0 = R29; \\ global() define
274 R0 = #VM_INT_DISABLE global() define
280 R0 = memw(R29 + #_PT_ER_VMEST); global() define
287 R0 = #VM_INT_DISABLE; global() define
301 R0 = R29; /* regs should still be at top of stack */ global() define
308 R0 = #VM_INT_DISABLE; global() define
331 R0 = R29 global() define
370 R0 = #VM_INT_DISABLE; global() define
374 R0 = R25; global() define
379 R0 = #VM_INT_DISABLE; global() define
[all...]
/kernel/liteos_a/arch/arm/arm/src/
H A Dlos_hw_runstop.S51 STR R0, [R2]
55 MRC P15, 0, R0, c0, c0, 5
56 AND R0, R0, #MPIDR_CPUID_MASK
57 MOV R1, #72 @This number is the total number of bytes in the task context register(R0~R15, SPSR, CPSR).
58 MUL R1, R1, R0
60 LDR R0, =g_saveSRContext
61 ADD R0, R0, R1
62 ADD R0, R
[all...]
/kernel/liteos_m/arch/arm/arm9/gcc/
H A Dlos_dispatch.S61 STMFD SP!, {R0}
63 MRS R0, SPSR
64 AND R0, R0, #OS_PSR_MODE_SYS
65 CMP R0, #OS_PSR_MODE_SYS
69 LDMFD SP!, {R0}
71 STMFD R0!, {LR}
72 MOV LR, R0
73 LDMFD SP!, {R0}
75 STMFD LR, {R0
[all...]
/kernel/uniproton/src/arch/cpu/armv7-m/cortex-m4/
H A Dprt_vector.S79 LDR R0, =g_bootVectors
81 STR R0, [R1]
85 LDR R0, =OS_NVIC_SHCSR
86 LDR R1, [R0]
88 STR R1, [R0]
92 LDR R0, =OS_NVIC_CCR
93 LDR R1, [R0]
95 STR R1, [R0]
98 LDR R0, =g_stackEnd @top of stack
100 SUB R0, R
[all...]
H A Dprt_dispatch.S105 LDR R0, =g_stackEnd
106 MSR MSP, R0
110 MOV R0, #2
111 MSR CONTROL, R0
114 LDR R0, =g_uniFlag
115 LDR R1, [R0]
118 STR R1, [R0]
121 LDR R0, =g_highestTask
122 LDR R0, [R0]
[all...]
/kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/non_secure/
H A Dlos_exc.S67 MOV R0, #OS_EXC_CAUSE_NMI
72 MOV R0, #OS_EXC_CAUSE_HARDFAULT
77 ORR R0, R0, R1, LSL #0x8
81 AND R0, R0 , #0x000000FF
83 ORR R0, R0, R1, LSL #0x8
88 AND R0, R0, #
[all...]
/kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/non_secure/
H A Dlos_exc.S67 MOV R0, #OS_EXC_CAUSE_NMI
72 MOV R0, #OS_EXC_CAUSE_HARDFAULT
77 ORR R0, R0, R1, LSL #0x8
81 AND R0, R0 , #0x000000FF
83 ORR R0, R0, R1, LSL #0x8
88 AND R0, R0, #
[all...]
/kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/non_secure/
H A Dlos_exc.S74 MOV R0, #OS_EXC_CAUSE_NMI
84 MOV R0, #OS_EXC_CAUSE_HARDFAULT
89 ORR R0, R0, R1, LSL #0x8
93 AND R0, R0 , #0x000000FF
95 ORR R0, R0, R1, LSL #0x8
100 AND R0, R0, #
[all...]
/kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/non_secure/
H A Dlos_exc.S74 MOV R0, #OS_EXC_CAUSE_NMI
84 MOV R0, #OS_EXC_CAUSE_HARDFAULT
89 ORR R0, R0, R1, LSL #0x8
93 AND R0, R0 , #0x000000FF
95 ORR R0, R0, R1, LSL #0x8
100 AND R0, R0, #
[all...]
/kernel/linux/linux-6.6/lib/
H A Dtest_bpf.c39 #define R0 BPF_REG_0 macro
280 insn[1] = BPF_ALU32_IMM(BPF_MOV, R0, 0xcbababab); in bpf_fill_maxinsns9()
284 insn[i] = BPF_ALU32_IMM(BPF_MOV, R0, 0xfefefefe); in bpf_fill_maxinsns9()
311 insn[hlen] = BPF_ALU32_IMM(BPF_MOV, R0, 0xabababac); in bpf_fill_maxinsns10()
441 insn[0] = BPF_ALU32_IMM(BPF_MOV, R0, 1); in __bpf_fill_stxdw()
445 insn[i] = BPF_STX_XADD(size, R10, R0, -40); in __bpf_fill_stxdw()
447 insn[len - 2] = BPF_LDX_MEM(size, R0, R10, -40); in __bpf_fill_stxdw()
492 insns[i++] = BPF_ALU64_IMM(BPF_MOV, R0, 1); in __bpf_fill_max_jmp()
493 insns[i++] = BPF_JMP_IMM(jmp, R0, imm, S16_MAX); in __bpf_fill_max_jmp()
494 insns[i++] = BPF_ALU64_IMM(BPF_MOV, R0, in __bpf_fill_max_jmp()
[all...]
/kernel/linux/linux-5.10/lib/
H A Dtest_bpf.c39 #define R0 BPF_REG_0 macro
277 insn[1] = BPF_ALU32_IMM(BPF_MOV, R0, 0xcbababab); in bpf_fill_maxinsns9()
281 insn[i] = BPF_ALU32_IMM(BPF_MOV, R0, 0xfefefefe); in bpf_fill_maxinsns9()
308 insn[hlen] = BPF_ALU32_IMM(BPF_MOV, R0, 0xabababac); in bpf_fill_maxinsns10()
438 insn[0] = BPF_ALU32_IMM(BPF_MOV, R0, 1); in __bpf_fill_stxdw()
442 insn[i] = BPF_STX_XADD(size, R10, R0, -40); in __bpf_fill_stxdw()
444 insn[len - 2] = BPF_LDX_MEM(size, R0, R10, -40); in __bpf_fill_stxdw()
1115 BPF_ALU64_REG(BPF_MOV, R0, R1),
1125 BPF_ALU64_IMM(BPF_MOV, R0, -1),
1131 BPF_ALU64_IMM(BPF_MOV, R0,
[all...]
/kernel/liteos_m/arch/arm/cortex-m4/gcc/
H A Dlos_exc.S75 MOV R0, #OS_EXC_CAUSE_NMI
85 MOV R0, #OS_EXC_CAUSE_HARDFAULT
90 ORR R0, R0, R1, LSL #0x8
94 AND R0, R0 , #0x000000FF
96 ORR R0, R0, R1, LSL #0x8
101 AND R0, R0, #
[all...]
/kernel/liteos_m/arch/arm/cortex-m33/gcc/TZ/secure/
H A Dlos_secure_context_asm.S47 LDR R0, =OS_SECURE_SCB_AIRCR
48 LDR R1, [R0]
60 STR R1, [R0]
62 MOV R0, #0
63 MSR PSPLIM, R0
64 MSR PSP, R0
65 MOV R0, #2
66 MSR CONTROL, R0
78 LDMIA R0!, {R1, R2} /* R1 = g_secureContext->curStackPointer, R2 = g_secureContext->stackLimit. */
89 MRS R0, IPS
[all...]
/kernel/liteos_m/arch/arm/cortex-m33/iar/TZ/secure/
H A Dlos_secure_context_asm.S45 LDR R0, =OS_SECURE_SCB_AIRCR
46 LDR R1, [R0]
58 STR R1, [R0]
60 MOV R0, #0
61 MSR PSPLIM, R0
62 MSR PSP, R0
63 MOV R0, #2
64 MSR CONTROL, R0
71 LDMIA R0!, {R1, R2} /* R1 = g_secureContext->curStackPointer, R2 = g_secureContext->stackLimit. */
77 MRS R0, IPS
[all...]
/kernel/liteos_m/arch/arm/cortex-m55/gcc/TZ/secure/
H A Dlos_secure_context_asm.S47 LDR R0, =OS_SECURE_SCB_AIRCR
48 LDR R1, [R0]
60 STR R1, [R0]
62 MOV R0, #0
63 MSR PSPLIM, R0
64 MSR PSP, R0
65 MOV R0, #2
66 MSR CONTROL, R0
78 LDMIA R0!, {R1, R2} /* R1 = g_secureContext->curStackPointer, R2 = g_secureContext->stackLimit. */
89 MRS R0, IPS
[all...]
/kernel/liteos_m/arch/arm/cortex-m55/iar/TZ/secure/
H A Dlos_secure_context_asm.S45 LDR R0, =OS_SECURE_SCB_AIRCR
46 LDR R1, [R0]
58 STR R1, [R0]
60 MOV R0, #0
61 MSR PSPLIM, R0
62 MSR PSP, R0
63 MOV R0, #2
64 MSR CONTROL, R0
71 LDMIA R0!, {R1, R2} /* R1 = g_secureContext->curStackPointer, R2 = g_secureContext->stackLimit. */
77 MRS R0, IPS
[all...]
/kernel/liteos_m/arch/arm/cortex-m3/keil/
H A Dlos_exc.S68 MOV R0, #OS_EXC_CAUSE_NMI
73 MOV R0, #OS_EXC_CAUSE_HARDFAULT
78 ORR R0, R0, R1, LSL #0x8
82 AND R0, R0 , #0x000000FF
84 ORR R0, R0, R1, LSL #0x8
89 AND R0, R0, #
[all...]
/kernel/liteos_m/arch/arm/cortex-m33/iar/NTZ/
H A Dlos_exc.S68 MOV R0, #OS_EXC_CAUSE_NMI
73 MOV R0, #OS_EXC_CAUSE_HARDFAULT
78 ORR R0, R0, R1, LSL #0x8
82 AND R0, R0 , #0x000000FF
84 ORR R0, R0, R1, LSL #0x8
89 AND R0, R0, #
[all...]
/kernel/liteos_m/arch/arm/cortex-m4/iar/
H A Dlos_exc.S68 MOV R0, #OS_EXC_CAUSE_NMI
73 MOV R0, #OS_EXC_CAUSE_HARDFAULT
78 ORR R0, R0, R1, LSL #0x8
82 AND R0, R0 , #0x000000FF
84 ORR R0, R0, R1, LSL #0x8
89 AND R0, R0, #
[all...]
/kernel/liteos_m/arch/arm/cortex-m55/iar/NTZ/
H A Dlos_exc.S68 MOV R0, #OS_EXC_CAUSE_NMI
73 MOV R0, #OS_EXC_CAUSE_HARDFAULT
78 ORR R0, R0, R1, LSL #0x8
82 AND R0, R0 , #0x000000FF
84 ORR R0, R0, R1, LSL #0x8
89 AND R0, R0, #
[all...]
/kernel/liteos_m/arch/arm/cortex-m7/iar/
H A Dlos_exc.S68 MOV R0, #OS_EXC_CAUSE_NMI
73 MOV R0, #OS_EXC_CAUSE_HARDFAULT
78 ORR R0, R0, R1, LSL #0x8
82 AND R0, R0 , #0x000000FF
84 ORR R0, R0, R1, LSL #0x8
89 AND R0, R0, #
[all...]
/kernel/liteos_m/arch/arm/cortex-m33/gcc/NTZ/
H A Dlos_exc.S75 MOV R0, #OS_EXC_CAUSE_NMI
85 MOV R0, #OS_EXC_CAUSE_HARDFAULT
90 ORR R0, R0, R1, LSL #0x8
94 AND R0, R0 , #0x000000FF
96 ORR R0, R0, R1, LSL #0x8
101 AND R0, R0, #
[all...]
/kernel/liteos_m/arch/arm/cortex-m55/gcc/NTZ/
H A Dlos_exc.S72 MOV R0, #OS_EXC_CAUSE_NMI
82 MOV R0, #OS_EXC_CAUSE_HARDFAULT
87 ORR R0, R0, R1, LSL #0x8
91 AND R0, R0, #0x000000FF
93 ORR R0, R0, R1, LSL #0x8
98 AND R0, R0, #
[all...]
/kernel/liteos_m/arch/arm/cortex-m7/gcc/
H A Dlos_exc.S75 MOV R0, #OS_EXC_CAUSE_NMI
85 MOV R0, #OS_EXC_CAUSE_HARDFAULT
90 ORR R0, R0, R1, LSL #0x8
94 AND R0, R0 , #0x000000FF
96 ORR R0, R0, R1, LSL #0x8
101 AND R0, R0, #
[all...]

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