PWR_CLK_DIS_BIT (reference) in projects: kernel

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/kernel/linux/linux-6.6/drivers/pmdomain/mediatek/
H A D	mtk-pm-domains.c	`35 #define PWR_CLK_DIS_BIT BIT(4) macro 236 regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT); in scpsys_power_on() 288 regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT); in scpsys_power_off()`
H A D	mtk-scpsys.c	`58 #define PWR_CLK_DIS_BIT BIT(4) macro 332 val &= ~PWR_CLK_DIS_BIT; in scpsys_power_on() 385 val \|= PWR_CLK_DIS_BIT; in scpsys_power_off()`
/kernel/linux/linux-5.10/drivers/soc/mediatek/
H A D	mtk-scpsys.c	`58 #define PWR_CLK_DIS_BIT BIT(4) macro 332 val &= ~PWR_CLK_DIS_BIT; in scpsys_power_on() 385 val \|= PWR_CLK_DIS_BIT; in scpsys_power_off()`