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Searched refs:PSW_SM_I (Results 1 - 15 of 15) sorted by relevance

/kernel/linux/linux-5.10/arch/parisc/kernel/
H A Dsyscall.S135 rsm PSW_SM_I, %r0 /* disable interrupts */
152 ssm PSW_SM_I, %r0 /* enable interrupts */
606 rsm PSW_SM_I, %r0 /* Disable interrupts */
612 ssm PSW_SM_I, %r0
649 ssm PSW_SM_I, %r0
661 ssm PSW_SM_I, %r0
773 rsm PSW_SM_I, %r0 /* Disable interrupts */
779 ssm PSW_SM_I, %r0
860 ssm PSW_SM_I, %r0
869 ssm PSW_SM_I,
[all...]
H A Dreal2.S161 rsm PSW_SM_I,%r0
198 rsm PSW_SM_I,%r0
H A Drelocate_kernel.S37 rsm PSW_SM_I, %r0
H A Dpacache.S43 rsm PSW_SM_I, %r19 /* save I-bit state */
155 rsm PSW_SM_I, %r0
199 rsm PSW_SM_I, %r22 /* No mmgt ops during loop*/
260 rsm PSW_SM_I, %r22 /* No mmgt ops during loop*/
1278 rsm PSW_SM_I, %r0
1334 rsm PSW_SM_I, %r0 /* prep to load iia queue */
H A Dentry.S58 rsm PSW_SM_I, %r0 /* barrier for "Relied upon Translation */
899 ssm PSW_SM_I, %r0
949 ssm PSW_SM_I, %r0
972 rsm PSW_SM_I, %r0 /* disable interrupts */
982 bb,<,n %r20, 31 - PSW_SM_I, intr_restore
985 /* ssm PSW_SM_I done later in intr_restore */
1863 rsm PSW_SM_I, %r0
1867 ssm PSW_SM_I, %r0
/kernel/linux/linux-5.10/arch/parisc/include/asm/
H A Dpsw.h16 #define PSW_SM_I PSW_I /* Enable External Interrupts */ macro
23 #define PSW_SM_QUIET PSW_SM_R+PSW_SM_Q+PSW_SM_P+PSW_SM_D+PSW_SM_I
H A Dspinlock.h34 if (flags & PSW_SM_I) { in arch_spin_lock_flags()
H A Dassembly.h490 rsm PSW_SM_I,%r0
/kernel/linux/linux-6.6/arch/parisc/include/asm/
H A Dpsw.h16 #define PSW_SM_I PSW_I /* Enable External Interrupts */ macro
23 #define PSW_SM_QUIET PSW_SM_R+PSW_SM_Q+PSW_SM_P+PSW_SM_D+PSW_SM_I
H A Dassembly.h537 rsm PSW_SM_I,%r0
550 rsm PSW_SM_I, %r0 /* barrier for "Relied upon Translation */
/kernel/linux/linux-6.6/arch/parisc/kernel/
H A Dsyscall.S162 rsm PSW_SM_I, %r0 /* disable interrupts */
179 ssm PSW_SM_I, %r0 /* enable interrupts */
524 ssm PSW_SM_I, %r0
529 ssm PSW_SM_I, %r0
538 ssm PSW_SM_I, %r0
631 rsm PSW_SM_I, %r0 /* Disable interrupts */
785 rsm PSW_SM_I, %r0 /* Disable interrupts */
1015 rsm PSW_SM_I, %r0 /* Disable interrupts */
1214 rsm PSW_SM_I, %r0 /* Disable interrupts */
H A Dreal2.S148 rsm PSW_SM_I,%r0
185 rsm PSW_SM_I,%r0
H A Drelocate_kernel.S37 rsm PSW_SM_I, %r0
H A Dpacache.S43 rsm PSW_SM_I, %r19 /* save I-bit state */
155 rsm PSW_SM_I, %r0
199 rsm PSW_SM_I, %r22 /* No mmgt ops during loop*/
260 rsm PSW_SM_I, %r22 /* No mmgt ops during loop*/
1216 rsm PSW_SM_I, %r0
1272 rsm PSW_SM_I, %r0 /* prep to load iia queue */
H A Dentry.S879 ssm PSW_SM_I, %r0
929 ssm PSW_SM_I, %r0
952 rsm PSW_SM_I, %r0 /* disable interrupts */
962 bb,<,n %r20, 31 - PSW_SM_I, intr_restore
965 /* ssm PSW_SM_I done later in intr_restore */
1789 rsm PSW_SM_I, %r0
1793 ssm PSW_SM_I, %r0

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