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Searched refs:PP_REFERENCE_DIVIDER_MASK (Results 1 - 8 of 8) sorted by relevance

/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dintel_pps_regs.h75 #define PP_REFERENCE_DIVIDER_MASK REG_GENMASK(31, 8) macro
H A Dintel_lvds.c176 pps->divider = REG_FIELD_GET(PP_REFERENCE_DIVIDER_MASK, val); in intel_lvds_pps_get_hw_state()
229 REG_FIELD_PREP(PP_REFERENCE_DIVIDER_MASK, pps->divider) | in intel_lvds_pps_init_hw()
H A Dintel_pps.c1544 REG_FIELD_PREP(PP_REFERENCE_DIVIDER_MASK, (100 * div) / 2 - 1) | REG_FIELD_PREP(PANEL_POWER_CYCLE_DELAY_MASK, DIV_ROUND_UP(seq->t11_t12, 1000))); in pps_init_registers()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
H A Dintel_lvds.c170 pps->divider = REG_FIELD_GET(PP_REFERENCE_DIVIDER_MASK, val); in intel_lvds_pps_get_hw_state()
220 REG_FIELD_PREP(PP_REFERENCE_DIVIDER_MASK, pps->divider) | REG_FIELD_PREP(PANEL_POWER_CYCLE_DELAY_MASK, DIV_ROUND_UP(pps->t4, 1000) + 1)); in intel_lvds_pps_init_hw()
H A Dintel_dp.c1174 pp_div &= PP_REFERENCE_DIVIDER_MASK; in edp_notify_handler()
7173 REG_FIELD_PREP(PP_REFERENCE_DIVIDER_MASK, (100 * div) / 2 - 1) | REG_FIELD_PREP(PANEL_POWER_CYCLE_DELAY_MASK, DIV_ROUND_UP(seq->t11_t12, 1000))); in intel_dp_init_panel_power_sequencer_registers()
/kernel/linux/linux-5.10/drivers/gpu/drm/gma500/
H A Dpsb_intel_reg.h200 #define PP_REFERENCE_DIVIDER_MASK (0xffffff00) macro
/kernel/linux/linux-6.6/drivers/gpu/drm/gma500/
H A Dpsb_intel_reg.h200 #define PP_REFERENCE_DIVIDER_MASK (0xffffff00) macro
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
H A Di915_reg.h5058 #define PP_REFERENCE_DIVIDER_MASK REG_GENMASK(31, 8) macro

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