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Help
Searched
refs:PLL_CTL0_RST
(Results
1 - 2
of
2
) sorted by relevance
/kernel/linux/linux-5.10/drivers/net/mdio/
H
A
D
mdio-mux-meson-g12a.c
21
#define
PLL_CTL0_RST
BIT(29)
macro
90
val |=
PLL_CTL0_RST
| PLL_CTL0_EN;
in g12a_ephy_pll_enable()
94
val &= ~
PLL_CTL0_RST
;
in g12a_ephy_pll_enable()
113
val |=
PLL_CTL0_RST
;
in g12a_ephy_pll_disable()
/kernel/linux/linux-6.6/drivers/net/mdio/
H
A
D
mdio-mux-meson-g12a.c
21
#define
PLL_CTL0_RST
BIT(29)
macro
88
val |=
PLL_CTL0_RST
| PLL_CTL0_EN;
in g12a_ephy_pll_enable()
92
val &= ~
PLL_CTL0_RST
;
in g12a_ephy_pll_enable()
111
val |=
PLL_CTL0_RST
;
in g12a_ephy_pll_disable()
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