Searched refs:PLLX_BASE (Results 1 - 12 of 12) sorted by relevance
| /kernel/linux/linux-5.10/drivers/clk/tegra/ |
| H A D | clk-tegra20.c | 56 #define PLLX_BASE 0xe0 macro
387 .base_reg = PLLX_BASE,
949 readl(clk_base + PLLX_BASE); in tegra20_cpu_clock_suspend()
974 base = readl_relaxed(clk_base + PLLX_BASE); in tegra20_cpu_clock_resume()
982 clk_base + PLLX_BASE); in tegra20_cpu_clock_resume()
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| H A D | clk-tegra-super-gen4.c | 17 #define PLLX_BASE 0xe0 macro
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| H A D | clk-tegra30.c | 61 #define PLLX_BASE 0xe0 macro
494 .base_reg = PLLX_BASE,
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| H A D | clk-tegra114.c | 61 #define PLLX_BASE 0xe0 macro
501 .base_reg = PLLX_BASE,
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| H A D | clk-tegra124.c | 54 #define PLLX_BASE 0xe0 macro
188 .base_reg = PLLX_BASE,
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| H A D | clk-tegra210.c | 78 #define PLLX_BASE 0xe0 macro
1609 .base_reg = PLLX_BASE,
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| /kernel/linux/linux-6.6/drivers/clk/tegra/ |
| H A D | clk-tegra20.c | 58 #define PLLX_BASE 0xe0 macro
389 .base_reg = PLLX_BASE,
944 readl(clk_base + PLLX_BASE); in tegra20_cpu_clock_suspend()
969 base = readl_relaxed(clk_base + PLLX_BASE); in tegra20_cpu_clock_resume()
977 clk_base + PLLX_BASE); in tegra20_cpu_clock_resume()
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| H A D | clk-tegra-super-gen4.c | 17 #define PLLX_BASE 0xe0 macro
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| H A D | clk-tegra30.c | 63 #define PLLX_BASE 0xe0 macro
496 .base_reg = PLLX_BASE,
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| H A D | clk-tegra114.c | 61 #define PLLX_BASE 0xe0 macro
501 .base_reg = PLLX_BASE,
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| H A D | clk-tegra124.c | 54 #define PLLX_BASE 0xe0 macro
188 .base_reg = PLLX_BASE,
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| H A D | clk-tegra210.c | 78 #define PLLX_BASE 0xe0 macro
1660 .base_reg = PLLX_BASE,
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