Searched refs:PIPE_LINK_M1 (Results 1 - 9 of 9) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/ |
| H A D | display.c | 258 vgpu_vreg_t(vgpu, PIPE_LINK_M1(TRANSCODER_A)) = 0x3cd6e; in emulate_monitor_status_change()
392 vgpu_vreg_t(vgpu, PIPE_LINK_M1(TRANSCODER_A)) = 0x3cd6e; in emulate_monitor_status_change()
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| H A D | handlers.c | 2206 MMIO_D(PIPE_LINK_M1(TRANSCODER_A), D_ALL); in init_generic_mmio_info()
2215 MMIO_D(PIPE_LINK_M1(TRANSCODER_B), D_ALL); in init_generic_mmio_info()
2224 MMIO_D(PIPE_LINK_M1(TRANSCODER_C), D_ALL); in init_generic_mmio_info()
2233 MMIO_D(PIPE_LINK_M1(TRANSCODER_EDP), D_ALL); in init_generic_mmio_info()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/gvt/ |
| H A D | display.c | 263 vgpu_vreg_t(vgpu, PIPE_LINK_M1(TRANSCODER_A)) = 0x3cd6e; in emulate_monitor_status_change()
397 vgpu_vreg_t(vgpu, PIPE_LINK_M1(TRANSCODER_A)) = 0x3cd6e; in emulate_monitor_status_change()
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| H A D | handlers.c | 670 link_m = vgpu_vreg_t(vgpu, PIPE_LINK_M1(TRANSCODER_A)); in vgpu_update_refresh_rate()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/ |
| H A D | intel_gvt_mmio_table.c | 265 MMIO_D(PIPE_LINK_M1(TRANSCODER_A)); in iterate_generic_mmio()
273 MMIO_D(PIPE_LINK_M1(TRANSCODER_B)); in iterate_generic_mmio()
281 MMIO_D(PIPE_LINK_M1(TRANSCODER_C)); in iterate_generic_mmio()
289 MMIO_D(PIPE_LINK_M1(TRANSCODER_EDP)); in iterate_generic_mmio()
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| H A D | i915_reg.h | 4002 #define PIPE_LINK_M1(tran) _MMIO_TRANS2(tran, _PIPEA_LINK_M1) macro
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| H A D | intel_display.c | 2471 PIPE_LINK_M1(transcoder), PIPE_LINK_N1(transcoder)); in intel_cpu_transcoder_set_m1_n1()
3230 PIPE_LINK_M1(transcoder), PIPE_LINK_N1(transcoder)); in intel_cpu_transcoder_get_m1_n1()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
| H A D | intel_display.c | 8339 intel_de_write(dev_priv, PIPE_LINK_M1(transcoder), in intel_cpu_transcoder_set_m_n()
10439 PIPE_LINK_M1(transcoder)); in intel_cpu_transcoder_get_m_n()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
| H A D | i915_reg.h | 7332 #define PIPE_LINK_M1(tran) _MMIO_TRANS2(tran, _PIPEA_LINK_M1) macro
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