PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_ENABLE__SHIFT (reference) in projects: kernel - OpenGrok search results

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Searched refs:PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_ENABLE__SHIFT (Results 1 - 12 of 12) sorted by relevance

/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn31/
H A D	dcn31_resource.h	`77 #define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_ENABLE__SHIFT 0x8 macro`
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/dce/
H A D	dce_11_2_sh_mask.h	`1708 #define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_ENABLE__SHIFT 0x8 macro [all...]`
H A D	dce_12_0_sh_mask.h	`2784 #define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_ENABLE__SHIFT 0x8 macro [all...]`
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/dce/
H A D	dce_11_2_sh_mask.h	`1708 #define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_ENABLE__SHIFT 0x8 macro [all...]`
H A D	dce_12_0_sh_mask.h	`2784 #define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_ENABLE__SHIFT 0x8 macro [all...]`
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A D	dcn_2_0_0_sh_mask.h	`701 #define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_ENABLE__SHIFT 0x8 macro [all...]`
H A D	dcn_1_0_sh_mask.h	`2138 #define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_ENABLE__SHIFT 0x8 macro [all...]`
H A D	dcn_3_0_0_sh_mask.h	`691 #define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_ENABLE__SHIFT 0x8 macro [all...]`
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A D	dcn_1_0_sh_mask.h	`2138 #define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_ENABLE__SHIFT 0x8 macro [all...]`
H A D	dcn_3_1_6_sh_mask.h	`1465 #define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_ENABLE__SHIFT 0x8 macro [all...]`
H A D	dcn_3_0_0_sh_mask.h	`692 #define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_ENABLE__SHIFT 0x8 macro [all...]`
H A D	dcn_2_0_0_sh_mask.h	`701 #define PHYPLLF_PIXCLK_RESYNC_CNTL__PHYPLLF_PIXCLK_ENABLE__SHIFT 0x8 macro [all...]`

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