| /kernel/linux/linux-6.6/drivers/phy/freescale/ |
| H A D | phy-fsl-imx8qm-lvds-phy.c | 22 #define M_MASK GENMASK(18, 17) macro
23 #define M(n) FIELD_PREP(M_MASK, (n))
39 #define CTRL_INIT_MASK (M_MASK | CCM_MASK | CA_MASK | TST_MASK | NB | RFB)
117 regmap_update_bits(priv->regmap, PHY_CTRL, M_MASK | NB, val); in mixel_lvds_phy_power_on()
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| /kernel/linux/linux-5.10/drivers/atm/ |
| H A D | iphase.c | 315 #define M_MASK 0x1ff in cellrate_to_float() macro
327 flot = NZ | (i << M_BITS) | (cr & M_MASK); in cellrate_to_float()
329 flot = NZ | (i << M_BITS) | ((cr << (M_BITS - i)) & M_MASK); in cellrate_to_float()
331 flot = NZ | (i << M_BITS) | ((cr >> (i - M_BITS)) & M_MASK); in cellrate_to_float()
346 mantissa = rate & M_MASK;
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| /kernel/linux/linux-6.6/drivers/atm/ |
| H A D | iphase.c | 314 #define M_MASK 0x1ff in cellrate_to_float() macro
326 flot = NZ | (i << M_BITS) | (cr & M_MASK); in cellrate_to_float()
328 flot = NZ | (i << M_BITS) | ((cr << (M_BITS - i)) & M_MASK); in cellrate_to_float()
330 flot = NZ | (i << M_BITS) | ((cr >> (i - M_BITS)) & M_MASK); in cellrate_to_float()
345 mantissa = rate & M_MASK;
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| /kernel/linux/linux-5.10/arch/powerpc/xmon/ |
| H A D | ppc-opc.c | 2464 #define M_MASK M (0x3f, 1)
2473 /* An M_MASK with the MB and ME fields fixed. */
2474 #define MMBME_MASK (M_MASK | MB_MASK | ME_MASK)
2476 /* An M_MASK with the SH and ME fields fixed. */
2477 #define MSHME_MASK (M_MASK | SH_MASK | ME_MASK)
4592 {"rlwimi", M(20,0), M_MASK, PPCCOM, PPCVLE, {RA, RS, SH, MBE, ME}},
4593 {"rlimi", M(20,0), M_MASK, PWRCOM, PPCVLE, {RA, RS, SH, MBE, ME}},
4595 {"rlwimi.", M(20,1), M_MASK, PPCCOM, PPCVLE, {RA, RS, SH, MBE, ME}},
4596 {"rlimi.", M(20,1), M_MASK, PWRCOM, PPCVLE, {RA, RS, SH, MBE, ME}},
4600 {"rlwinm", M(21,0), M_MASK, PPCCO
2461 #define M_MASK global() macro
[all...] |
| /kernel/linux/linux-6.6/arch/powerpc/xmon/ |
| H A D | ppc-opc.c | 2464 #define M_MASK M (0x3f, 1)
2473 /* An M_MASK with the MB and ME fields fixed. */
2474 #define MMBME_MASK (M_MASK | MB_MASK | ME_MASK)
2476 /* An M_MASK with the SH and ME fields fixed. */
2477 #define MSHME_MASK (M_MASK | SH_MASK | ME_MASK)
4592 {"rlwimi", M(20,0), M_MASK, PPCCOM, PPCVLE, {RA, RS, SH, MBE, ME}},
4593 {"rlimi", M(20,0), M_MASK, PWRCOM, PPCVLE, {RA, RS, SH, MBE, ME}},
4595 {"rlwimi.", M(20,1), M_MASK, PPCCOM, PPCVLE, {RA, RS, SH, MBE, ME}},
4596 {"rlimi.", M(20,1), M_MASK, PWRCOM, PPCVLE, {RA, RS, SH, MBE, ME}},
4600 {"rlwinm", M(21,0), M_MASK, PPCCO
2461 #define M_MASK global() macro
[all...] |
| /kernel/linux/linux-5.10/drivers/iommu/ |
| H A D | msm_iommu_hw-8xxx.h | 1123 #define M (M_MASK << M_SHIFT)
1585 #define M_MASK 0x01 macro
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| /kernel/linux/linux-6.6/drivers/iommu/ |
| H A D | msm_iommu_hw-8xxx.h | 1123 #define M (M_MASK << M_SHIFT)
1585 #define M_MASK 0x01 macro
|