Searched refs:MXS_SET (Results 1 - 2 of 2) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpio/ |
| H A D | gpio-mxs.c | 23 #define MXS_SET 0x4 macro
113 writel(pin_mask, pin_addr + MXS_SET); in mxs_gpio_set_irq_type()
114 writel(pin_mask, port->base + PINCTRL_IRQEN(port) + MXS_SET); in mxs_gpio_set_irq_type()
117 writel(pin_mask, port->base + PINCTRL_PIN2IRQ(port) + MXS_SET); in mxs_gpio_set_irq_type()
123 writel(pin_mask, pin_addr + MXS_SET); in mxs_gpio_set_irq_type()
146 writel(bit, pin_addr + MXS_SET); in mxs_flip_edge()
214 ct->regs.enable = PINCTRL_PIN2IRQ(port) + MXS_SET; in mxs_gpio_init_gc()
226 ct->regs.enable = PINCTRL_IRQEN(port) + MXS_SET; in mxs_gpio_init_gc()
343 port->base + PINCTRL_DOUT(port) + MXS_SET, in mxs_gpio_probe()
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| /kernel/linux/linux-6.6/drivers/gpio/ |
| H A D | gpio-mxs.c | 22 #define MXS_SET 0x4 macro
107 writel(pin_mask, pin_addr + MXS_SET); in mxs_gpio_set_irq_type()
108 writel(pin_mask, port->base + PINCTRL_IRQEN(port) + MXS_SET); in mxs_gpio_set_irq_type()
111 writel(pin_mask, port->base + PINCTRL_PIN2IRQ(port) + MXS_SET); in mxs_gpio_set_irq_type()
117 writel(pin_mask, pin_addr + MXS_SET); in mxs_gpio_set_irq_type()
140 writel(bit, pin_addr + MXS_SET); in mxs_flip_edge()
208 ct->regs.enable = PINCTRL_PIN2IRQ(port) + MXS_SET; in mxs_gpio_init_gc()
220 ct->regs.enable = PINCTRL_IRQEN(port) + MXS_SET; in mxs_gpio_init_gc()
324 port->base + PINCTRL_DOUT(port) + MXS_SET, in mxs_gpio_probe()
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