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Searched refs:MG_REFCLKIN_CTL_OD_2_MUX_MASK (Results 1 - 4 of 4) sorted by relevance

/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
H A Dintel_mg_phy_regs.h162 #define MG_REFCLKIN_CTL_OD_2_MUX_MASK (0x7 << 8) macro
H A Dintel_dpll_mgr.c3419 hw_state->mg_refclkin_ctl &= MG_REFCLKIN_CTL_OD_2_MUX_MASK; in mg_pll_get_hw_state()
3487 hw_state->mg_refclkin_ctl &= MG_REFCLKIN_CTL_OD_2_MUX_MASK; in dkl_pll_get_hw_state()
3664 MG_REFCLKIN_CTL_OD_2_MUX_MASK, hw_state->mg_refclkin_ctl); in icl_mg_pll_write()
3707 val &= ~MG_REFCLKIN_CTL_OD_2_MUX_MASK; in dkl_pll_write()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
H A Dintel_dpll_mgr.c3696 hw_state->mg_refclkin_ctl &= MG_REFCLKIN_CTL_OD_2_MUX_MASK; in mg_pll_get_hw_state()
3767 hw_state->mg_refclkin_ctl &= MG_REFCLKIN_CTL_OD_2_MUX_MASK; in dkl_pll_get_hw_state()
3920 val &= ~MG_REFCLKIN_CTL_OD_2_MUX_MASK; in icl_mg_pll_write()
3973 val &= ~MG_REFCLKIN_CTL_OD_2_MUX_MASK; in dkl_pll_write()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
H A Di915_reg.h10330 #define MG_REFCLKIN_CTL_OD_2_MUX_MASK (0x7 << 8) macro

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