Searched refs:MEMSWCTL (Results 1 - 7 of 7) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/ |
| H A D | intel_rps.c | 400 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL); in gen5_rps_set()
414 intel_uncore_write16(uncore, MEMSWCTL, rgvswctl); in gen5_rps_set()
415 intel_uncore_posting_read16(uncore, MEMSWCTL); in gen5_rps_set()
418 intel_uncore_write16(uncore, MEMSWCTL, rgvswctl); in gen5_rps_set()
544 if (wait_for_atomic((intel_uncore_read(uncore, MEMSWCTL) & in gen5_rps_enable()
574 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL); in gen5_rps_disable()
591 intel_uncore_write(uncore, MEMSWCTL, rgvswctl); in gen5_rps_disable()
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| H A D | debugfs_gt_pm.c | 253 u16 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL); in frequency_show()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/ |
| H A D | intel_rps.c | 437 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL); in __gen5_rps_set()
451 intel_uncore_write16(uncore, MEMSWCTL, rgvswctl); in __gen5_rps_set()
452 intel_uncore_posting_read16(uncore, MEMSWCTL); in __gen5_rps_set()
455 intel_uncore_write16(uncore, MEMSWCTL, rgvswctl); in __gen5_rps_set()
593 if (wait_for_atomic((intel_uncore_read(uncore, MEMSWCTL) & in gen5_rps_enable()
632 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL); in gen5_rps_disable()
642 intel_uncore_write(uncore, MEMSWCTL, rgvswctl); in gen5_rps_disable()
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| H A D | intel_gt_pm_debugfs.c | 346 u16 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL); in intel_gt_pm_frequency_dump()
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| H A D | intel_gt_regs.h | 1280 #define MEMSWCTL _MMIO(0x11170) /* Ironlake only */ macro
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
| H A D | i915_debugfs.c | 794 u16 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL); in i915_frequency_info()
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| H A D | i915_reg.h | 3867 #define MEMSWCTL _MMIO(0x11170) /* Ironlake only */ macro
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