JH7110_SYSCLK_VOUT_AXI (reference) in projects: kernel

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/kernel/linux/linux-6.6/drivers/clk/starfive/
H A D	clk-starfive-jh7110-sys.c	`127 JH71X0__DIV(JH7110_SYSCLK_VOUT_AXI, "vout_axi", 7, JH7110_SYSCLK_PLL2_OUT), 128 JH71X0_GATE(JH7110_SYSCLK_NOC_BUS_DISP_AXI, "noc_bus_disp_axi", 0, JH7110_SYSCLK_VOUT_AXI), 130 JH71X0_GATE(JH7110_SYSCLK_VOUT_TOP_AXI, "vout_top_axi", 0, JH7110_SYSCLK_VOUT_AXI),`
/kernel/linux/linux-6.6/include/dt-bindings/clock/
H A D	starfive,jh7110-crg.h	`76 #define JH7110_SYSCLK_VOUT_AXI 59 macro`
/kernel/linux/linux-6.6/scripts/dtc/include-prefixes/dt-bindings/clock/
H A D	starfive,jh7110-crg.h	`76 #define JH7110_SYSCLK_VOUT_AXI 59 macro`