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Searched refs:IP4_7_4 (Results 1 - 17 of 17) sorted by relevance

/kernel/linux/linux-5.10/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c95 #define GPSR2_10 F_(VI0_DATA6, IP4_7_4)
186 #define IP4_7_4 FM(VI0_DATA6) FM(HTX1) FM(CTS1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
269 FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
524 PINMUX_IPSR_GPSR(IP4_7_4, VI0_DATA6),
525 PINMUX_IPSR_GPSR(IP4_7_4, HTX1),
526 PINMUX_IPSR_GPSR(IP4_7_4, CTS1_N),
2387 IP4_7_4
H A Dpfc-r8a77990.c100 #define GPSR1_10 F_(A10, IP4_7_4)
249 #define IP4_7_4 FM(A10) FM(IRQ4) FM(MSIOF2_SYNC_B) FM(VI4_DATA13) FM(VI5_FIELD_A) FM(DU_DG5) FM(FSCLKST2_N_B) F_(0, 0) FM(LCDOUT13) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
396 FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
738 PINMUX_IPSR_GPSR(IP4_7_4, A10),
739 PINMUX_IPSR_GPSR(IP4_7_4, IRQ4),
740 PINMUX_IPSR_MSEL(IP4_7_4, MSIOF2_SYNC_B, SEL_MSIOF2_1),
741 PINMUX_IPSR_GPSR(IP4_7_4, VI4_DATA13),
742 PINMUX_IPSR_MSEL(IP4_7_4, VI5_FIELD_A, SEL_VIN5_0),
743 PINMUX_IPSR_GPSR(IP4_7_4, DU_DG
[all...]
H A Dpfc-r8a77980.c109 #define GPSR2_10 F_(VI0_DATA6, IP4_7_4)
219 #define IP4_7_4 FM(VI0_DATA6) FM(HTX1) FM(CTS1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
320 FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
606 PINMUX_IPSR_GPSR(IP4_7_4, VI0_DATA6),
607 PINMUX_IPSR_GPSR(IP4_7_4, HTX1),
608 PINMUX_IPSR_GPSR(IP4_7_4, CTS1_N),
2809 IP4_7_4
H A Dpfc-r8a77995.c51 #define GPSR1_26 F_(DU_VSYNC, IP4_7_4)
234 #define IP4_7_4 FM(DU_VSYNC) FM(QSTVA_QVS) FM(IRQ4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
359 FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
655 PINMUX_IPSR_GPSR(IP4_7_4, DU_VSYNC),
656 PINMUX_IPSR_GPSR(IP4_7_4, QSTVA_QVS),
657 PINMUX_IPSR_MSEL(IP4_7_4, IRQ4_A, SEL_IRQ_4_0),
2668 IP4_7_4
H A Dpfc-r8a77951.c110 #define GPSR1_18 F_(A18, IP4_7_4)
290 #define IP4_7_4 FM(A18) FM(LCDOUT10) F_(0, 0) F_(0, 0) FM(VI4_HSYNC_N) F_(0, 0) FM(DU_DG2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
456 FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
864 PINMUX_IPSR_GPSR(IP4_7_4, A18),
865 PINMUX_IPSR_GPSR(IP4_7_4, LCDOUT10),
866 PINMUX_IPSR_GPSR(IP4_7_4, VI4_HSYNC_N),
867 PINMUX_IPSR_GPSR(IP4_7_4, DU_DG2),
5436 IP4_7_4
H A Dpfc-r8a77965.c115 #define GPSR1_18 F_(A18, IP4_7_4)
295 #define IP4_7_4 FM(A18) FM(LCDOUT10) F_(0, 0) F_(0, 0) FM(VI4_HSYNC_N) F_(0, 0) FM(DU_DG2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
461 FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
870 PINMUX_IPSR_GPSR(IP4_7_4, A18),
871 PINMUX_IPSR_GPSR(IP4_7_4, LCDOUT10),
872 PINMUX_IPSR_GPSR(IP4_7_4, VI4_HSYNC_N),
873 PINMUX_IPSR_GPSR(IP4_7_4, DU_DG2),
5642 IP4_7_4
H A Dpfc-r8a7796.c115 #define GPSR1_18 F_(A18, IP4_7_4)
295 #define IP4_7_4 FM(A18) FM(LCDOUT10) F_(0, 0) F_(0, 0) FM(VI4_HSYNC_N) F_(0, 0) FM(DU_DG2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
461 FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
868 PINMUX_IPSR_GPSR(IP4_7_4, A18),
869 PINMUX_IPSR_GPSR(IP4_7_4, LCDOUT10),
870 PINMUX_IPSR_GPSR(IP4_7_4, VI4_HSYNC_N),
871 PINMUX_IPSR_GPSR(IP4_7_4, DU_DG2),
5389 IP4_7_4
H A Dpfc-r8a77950.c109 #define GPSR1_18 F_(A18, IP4_7_4)
289 #define IP4_7_4 FM(A18) FM(LCDOUT10) F_(0, 0) F_(0, 0) FM(VI4_HSYNC_N) F_(0, 0) FM(DU_DG2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
446 FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
857 PINMUX_IPSR_GPSR(IP4_7_4, A18),
858 PINMUX_IPSR_GPSR(IP4_7_4, LCDOUT10),
859 PINMUX_IPSR_GPSR(IP4_7_4, VI4_HSYNC_N),
860 PINMUX_IPSR_GPSR(IP4_7_4, DU_DG2),
5075 IP4_7_4
H A Dpfc-r8a77470.c666 PINMUX_IPSR_GPSR(IP4_7_4, DU0_DR0),
667 PINMUX_IPSR_MSEL(IP4_7_4, RX5_C, SEL_SCIF5_2),
668 PINMUX_IPSR_MSEL(IP4_7_4, SCL2_D, SEL_I2C02_3),
669 PINMUX_IPSR_GPSR(IP4_7_4, A0),
2882 /* IP4_7_4 [4] */
/kernel/linux/linux-6.6/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c106 #define GPSR2_10 F_(VI0_DATA6, IP4_7_4)
197 #define IP4_7_4 FM(VI0_DATA6) FM(HTX1) FM(CTS1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
279 FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
533 PINMUX_IPSR_GPSR(IP4_7_4, VI0_DATA6),
534 PINMUX_IPSR_GPSR(IP4_7_4, HTX1),
535 PINMUX_IPSR_GPSR(IP4_7_4, CTS1_N),
2279 IP4_7_4
H A Dpfc-r8a77990.c100 #define GPSR1_10 F_(A10, IP4_7_4)
249 #define IP4_7_4 FM(A10) FM(IRQ4) FM(MSIOF2_SYNC_B) FM(VI4_DATA13) FM(VI5_FIELD_A) FM(DU_DG5) FM(FSCLKST2_N_B) F_(0, 0) FM(LCDOUT13) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
396 FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
739 PINMUX_IPSR_GPSR(IP4_7_4, A10),
740 PINMUX_IPSR_GPSR(IP4_7_4, IRQ4),
741 PINMUX_IPSR_MSEL(IP4_7_4, MSIOF2_SYNC_B, SEL_MSIOF2_1),
742 PINMUX_IPSR_GPSR(IP4_7_4, VI4_DATA13),
743 PINMUX_IPSR_MSEL(IP4_7_4, VI5_FIELD_A, SEL_VIN5_0),
744 PINMUX_IPSR_GPSR(IP4_7_4, DU_DG
[all...]
H A Dpfc-r8a77995.c62 #define GPSR1_26 F_(DU_VSYNC, IP4_7_4)
245 #define IP4_7_4 FM(DU_VSYNC) FM(QSTVA_QVS) FM(IRQ4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
370 FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
666 PINMUX_IPSR_GPSR(IP4_7_4, DU_VSYNC),
667 PINMUX_IPSR_GPSR(IP4_7_4, QSTVA_QVS),
668 PINMUX_IPSR_MSEL(IP4_7_4, IRQ4_A, SEL_IRQ_4_0),
2720 IP4_7_4
H A Dpfc-r8a77980.c121 #define GPSR2_10 F_(VI0_DATA6, IP4_7_4)
231 #define IP4_7_4 FM(VI0_DATA6) FM(HTX1) FM(CTS1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
329 FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
615 PINMUX_IPSR_GPSR(IP4_7_4, VI0_DATA6),
616 PINMUX_IPSR_GPSR(IP4_7_4, HTX1),
617 PINMUX_IPSR_GPSR(IP4_7_4, CTS1_N),
2733 IP4_7_4
H A Dpfc-r8a77951.c109 #define GPSR1_18 F_(A18, IP4_7_4)
289 #define IP4_7_4 FM(A18) FM(LCDOUT10) F_(0, 0) F_(0, 0) FM(VI4_HSYNC_N) F_(0, 0) FM(DU_DG2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
455 FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
863 PINMUX_IPSR_GPSR(IP4_7_4, A18),
864 PINMUX_IPSR_GPSR(IP4_7_4, LCDOUT10),
865 PINMUX_IPSR_GPSR(IP4_7_4, VI4_HSYNC_N),
866 PINMUX_IPSR_GPSR(IP4_7_4, DU_DG2),
5394 IP4_7_4
H A Dpfc-r8a77965.c114 #define GPSR1_18 F_(A18, IP4_7_4)
294 #define IP4_7_4 FM(A18) FM(LCDOUT10) F_(0, 0) F_(0, 0) FM(VI4_HSYNC_N) F_(0, 0) FM(DU_DG2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
460 FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
869 PINMUX_IPSR_GPSR(IP4_7_4, A18),
870 PINMUX_IPSR_GPSR(IP4_7_4, LCDOUT10),
871 PINMUX_IPSR_GPSR(IP4_7_4, VI4_HSYNC_N),
872 PINMUX_IPSR_GPSR(IP4_7_4, DU_DG2),
5590 IP4_7_4
H A Dpfc-r8a7796.c114 #define GPSR1_18 F_(A18, IP4_7_4)
294 #define IP4_7_4 FM(A18) FM(LCDOUT10) F_(0, 0) F_(0, 0) FM(VI4_HSYNC_N) F_(0, 0) FM(DU_DG2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
460 FM(IP4_7_4) IP4_7_4 FM(IP5_7_4) IP5_7_4 FM(IP6_7_4) IP6_7_4 FM(IP7_7_4) IP7_7_4 \
867 PINMUX_IPSR_GPSR(IP4_7_4, A18),
868 PINMUX_IPSR_GPSR(IP4_7_4, LCDOUT10),
869 PINMUX_IPSR_GPSR(IP4_7_4, VI4_HSYNC_N),
870 PINMUX_IPSR_GPSR(IP4_7_4, DU_DG2),
5349 IP4_7_4
H A Dpfc-r8a77470.c676 PINMUX_IPSR_GPSR(IP4_7_4, DU0_DR0),
677 PINMUX_IPSR_MSEL(IP4_7_4, RX5_C, SEL_SCIF5_2),
678 PINMUX_IPSR_MSEL(IP4_7_4, SCL2_D, SEL_I2C02_3),
679 PINMUX_IPSR_GPSR(IP4_7_4, A0),
2799 /* IP4_7_4 [4] */

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