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Searched refs:IP4_15_12 (Results 1 - 17 of 17) sorted by relevance

/kernel/linux/linux-5.10/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c93 #define GPSR2_12 F_(VI0_DATA8, IP4_15_12)
188 #define IP4_15_12 FM(VI0_DATA8) FM(HSCK2) FM(PWM0_A) FM(A22) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
271 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
532 PINMUX_IPSR_GPSR(IP4_15_12, VI0_DATA8),
533 PINMUX_IPSR_GPSR(IP4_15_12, HSCK2),
534 PINMUX_IPSR_MSEL(IP4_15_12, PWM0_A, SEL_PWM0_0),
2385 IP4_15_12
H A Dpfc-r8a77995.c49 #define GPSR1_28 F_(DU_DISP_CDE, IP4_15_12)
236 #define IP4_15_12 FM(DU_DISP_CDE) FM(QCPV_QDE) FM(IRQ2_B) FM(DU_DOTCLKIN1)F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
361 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
663 PINMUX_IPSR_GPSR(IP4_15_12, DU_DISP_CDE),
664 PINMUX_IPSR_GPSR(IP4_15_12, QCPV_QDE),
665 PINMUX_IPSR_MSEL(IP4_15_12, IRQ2_B, SEL_IRQ_2_1),
666 PINMUX_IPSR_GPSR(IP4_15_12, DU_DOTCLKIN1),
2666 IP4_15_12
H A Dpfc-r8a77990.c98 #define GPSR1_12 F_(A12, IP4_15_12)
251 #define IP4_15_12 FM(A12) FM(RX5_A) FM(MSIOF2_SS2_B) FM(VI4_DATA17) FM(VI5_DATA3_A) FM(DU_DG6) F_(0, 0) F_(0, 0) FM(LCDOUT14) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
398 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
755 PINMUX_IPSR_GPSR(IP4_15_12, A12),
756 PINMUX_IPSR_MSEL(IP4_15_12, RX5_A, SEL_SCIF5_0),
757 PINMUX_IPSR_GPSR(IP4_15_12, MSIOF2_SS2_B),
758 PINMUX_IPSR_GPSR(IP4_15_12, VI4_DATA17),
759 PINMUX_IPSR_MSEL(IP4_15_12, VI5_DATA3_A, SEL_VIN5_0),
760 PINMUX_IPSR_GPSR(IP4_15_12, DU_DG
[all...]
H A Dpfc-r8a77980.c107 #define GPSR2_12 F_(VI0_DATA8, IP4_15_12)
221 #define IP4_15_12 FM(VI0_DATA8) FM(HSCK2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
322 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
614 PINMUX_IPSR_GPSR(IP4_15_12, VI0_DATA8),
615 PINMUX_IPSR_GPSR(IP4_15_12, HSCK2),
2807 IP4_15_12
H A Dpfc-r8a77470.c674 PINMUX_IPSR_GPSR(IP4_15_12, DU0_DR2),
675 PINMUX_IPSR_MSEL(IP4_15_12, RX0_D, SEL_SCIF0_3),
676 PINMUX_IPSR_MSEL(IP4_15_12, SCL0_E, SEL_I2C00_4),
677 PINMUX_IPSR_GPSR(IP4_15_12, A2),
2876 /* IP4_15_12 [4] */
H A Dpfc-r8a77951.c108 #define GPSR1_20 F_(CS0_N, IP4_15_12)
292 #define IP4_15_12 FM(CS0_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI5_CLKENB) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
458 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \
874 PINMUX_IPSR_GPSR(IP4_15_12, CS0_N),
875 PINMUX_IPSR_GPSR(IP4_15_12, VI5_CLKENB),
5434 IP4_15_12
H A Dpfc-r8a77965.c113 #define GPSR1_20 F_(CS0_N, IP4_15_12)
297 #define IP4_15_12 FM(CS0_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI5_CLKENB) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
463 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \
880 PINMUX_IPSR_GPSR(IP4_15_12, CS0_N),
881 PINMUX_IPSR_GPSR(IP4_15_12, VI5_CLKENB),
5640 IP4_15_12
H A Dpfc-r8a7796.c113 #define GPSR1_20 F_(CS0_N, IP4_15_12)
297 #define IP4_15_12 FM(CS0_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI5_CLKENB) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
463 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \
878 PINMUX_IPSR_GPSR(IP4_15_12, CS0_N),
879 PINMUX_IPSR_GPSR(IP4_15_12, VI5_CLKENB),
5387 IP4_15_12
H A Dpfc-r8a77950.c107 #define GPSR1_20 F_(CS0_N, IP4_15_12)
291 #define IP4_15_12 FM(CS0_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI5_CLKENB) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
448 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
867 PINMUX_IPSR_GPSR(IP4_15_12, CS0_N),
868 PINMUX_IPSR_GPSR(IP4_15_12, VI5_CLKENB),
5073 IP4_15_12
/kernel/linux/linux-6.6/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c104 #define GPSR2_12 F_(VI0_DATA8, IP4_15_12)
199 #define IP4_15_12 FM(VI0_DATA8) FM(HSCK2) FM(PWM0_A) FM(A22) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
281 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
541 PINMUX_IPSR_GPSR(IP4_15_12, VI0_DATA8),
542 PINMUX_IPSR_GPSR(IP4_15_12, HSCK2),
543 PINMUX_IPSR_MSEL(IP4_15_12, PWM0_A, SEL_PWM0_0),
2277 IP4_15_12
H A Dpfc-r8a77995.c60 #define GPSR1_28 F_(DU_DISP_CDE, IP4_15_12)
247 #define IP4_15_12 FM(DU_DISP_CDE) FM(QCPV_QDE) FM(IRQ2_B) FM(DU_DOTCLKIN1)F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
372 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
674 PINMUX_IPSR_GPSR(IP4_15_12, DU_DISP_CDE),
675 PINMUX_IPSR_GPSR(IP4_15_12, QCPV_QDE),
676 PINMUX_IPSR_MSEL(IP4_15_12, IRQ2_B, SEL_IRQ_2_1),
677 PINMUX_IPSR_GPSR(IP4_15_12, DU_DOTCLKIN1),
2718 IP4_15_12
H A Dpfc-r8a77990.c98 #define GPSR1_12 F_(A12, IP4_15_12)
251 #define IP4_15_12 FM(A12) FM(RX5_A) FM(MSIOF2_SS2_B) FM(VI4_DATA17) FM(VI5_DATA3_A) FM(DU_DG6) F_(0, 0) F_(0, 0) FM(LCDOUT14) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
398 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
756 PINMUX_IPSR_GPSR(IP4_15_12, A12),
757 PINMUX_IPSR_MSEL(IP4_15_12, RX5_A, SEL_SCIF5_0),
758 PINMUX_IPSR_GPSR(IP4_15_12, MSIOF2_SS2_B),
759 PINMUX_IPSR_GPSR(IP4_15_12, VI4_DATA17),
760 PINMUX_IPSR_MSEL(IP4_15_12, VI5_DATA3_A, SEL_VIN5_0),
761 PINMUX_IPSR_GPSR(IP4_15_12, DU_DG
[all...]
H A Dpfc-r8a77980.c119 #define GPSR2_12 F_(VI0_DATA8, IP4_15_12)
233 #define IP4_15_12 FM(VI0_DATA8) FM(HSCK2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
331 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 FM(IP7_15_12) IP7_15_12 \
623 PINMUX_IPSR_GPSR(IP4_15_12, VI0_DATA8),
624 PINMUX_IPSR_GPSR(IP4_15_12, HSCK2),
2731 IP4_15_12
H A Dpfc-r8a77470.c684 PINMUX_IPSR_GPSR(IP4_15_12, DU0_DR2),
685 PINMUX_IPSR_MSEL(IP4_15_12, RX0_D, SEL_SCIF0_3),
686 PINMUX_IPSR_MSEL(IP4_15_12, SCL0_E, SEL_I2C00_4),
687 PINMUX_IPSR_GPSR(IP4_15_12, A2),
2793 /* IP4_15_12 [4] */
H A Dpfc-r8a77951.c107 #define GPSR1_20 F_(CS0_N, IP4_15_12)
291 #define IP4_15_12 FM(CS0_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI5_CLKENB) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
457 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \
873 PINMUX_IPSR_GPSR(IP4_15_12, CS0_N),
874 PINMUX_IPSR_GPSR(IP4_15_12, VI5_CLKENB),
5392 IP4_15_12
H A Dpfc-r8a77965.c112 #define GPSR1_20 F_(CS0_N, IP4_15_12)
296 #define IP4_15_12 FM(CS0_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI5_CLKENB) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
462 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \
879 PINMUX_IPSR_GPSR(IP4_15_12, CS0_N),
880 PINMUX_IPSR_GPSR(IP4_15_12, VI5_CLKENB),
5588 IP4_15_12
H A Dpfc-r8a7796.c112 #define GPSR1_20 F_(CS0_N, IP4_15_12)
296 #define IP4_15_12 FM(CS0_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(VI5_CLKENB) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
462 FM(IP4_15_12) IP4_15_12 FM(IP5_15_12) IP5_15_12 FM(IP6_15_12) IP6_15_12 \
877 PINMUX_IPSR_GPSR(IP4_15_12, CS0_N),
878 PINMUX_IPSR_GPSR(IP4_15_12, VI5_CLKENB),
5347 IP4_15_12

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