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Searched refs:IP2_7_4 (Results 1 - 19 of 19) sorted by relevance

/kernel/linux/linux-5.10/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c39 #define GPSR0_17 F_(DU_DB7, IP2_7_4)
170 #define IP2_7_4 FM(DU_DB7) F_(0, 0) F_(0, 0) FM(A17) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
260 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
455 PINMUX_IPSR_GPSR(IP2_7_4, DU_DB7),
456 PINMUX_IPSR_GPSR(IP2_7_4, A17),
2367 IP2_7_4
H A Dpfc-r8a7779.c739 PINMUX_IPSR_MSEL(IP2_7_4, HSCK0, SEL_HSCIF0_0),
740 PINMUX_IPSR_MSEL(IP2_7_4, SCK1, SEL_SCIF1_0),
741 PINMUX_IPSR_GPSR(IP2_7_4, MTS),
742 PINMUX_IPSR_GPSR(IP2_7_4, PWM5),
743 PINMUX_IPSR_MSEL(IP2_7_4, SCK0_C, SEL_SCIF0_2),
744 PINMUX_IPSR_MSEL(IP2_7_4, SSI_SDATA9_B, SEL_SSI9_1),
745 PINMUX_IPSR_GPSR(IP2_7_4, SUB_TDO),
746 PINMUX_IPSR_GPSR(IP2_7_4, CC5_STATE0),
747 PINMUX_IPSR_GPSR(IP2_7_4, CC5_STATE8),
748 PINMUX_IPSR_GPSR(IP2_7_4, CC5_STATE1
[all...]
H A Dpfc-r8a77980.c40 #define GPSR0_17 F_(DU_DB7, IP2_7_4)
203 #define IP2_7_4 FM(DU_DB7) FM(MSIOF3_TXD) F_(0, 0) FM(A17) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
311 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
535 PINMUX_IPSR_GPSR(IP2_7_4, DU_DB7),
536 PINMUX_IPSR_GPSR(IP2_7_4, MSIOF3_TXD),
537 PINMUX_IPSR_GPSR(IP2_7_4, A17),
2789 IP2_7_4
H A Dpfc-r8a77995.c67 #define GPSR1_10 F_(DU_DG2, IP2_7_4)
216 #define IP2_7_4 FM(DU_DG2) FM(LCDOUT10) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
350 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
591 PINMUX_IPSR_GPSR(IP2_7_4, DU_DG2),
592 PINMUX_IPSR_GPSR(IP2_7_4, LCDOUT10),
2648 IP2_7_4
H A Dpfc-r8a77470.c609 PINMUX_IPSR_GPSR(IP2_7_4, D7),
610 PINMUX_IPSR_GPSR(IP2_7_4, HSCK2),
611 PINMUX_IPSR_MSEL(IP2_7_4, SCIF1_SCK_C, SEL_SCIF1_2),
612 PINMUX_IPSR_GPSR(IP2_7_4, IRQ6),
613 PINMUX_IPSR_GPSR(IP2_7_4, PWM5_C),
2825 /* IP2_7_4 [4] */
H A Dpfc-r8a77951.c126 #define GPSR1_2 F_(A2, IP2_7_4)
272 #define IP2_7_4 FM(A2) FM(LCDOUT18) FM(MSIOF3_SCK_B) F_(0, 0) FM(VI4_DATA10) F_(0, 0) FM(DU_DB2) F_(0, 0) F_(0, 0) FM(PWM5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
447 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
751 PINMUX_IPSR_GPSR(IP2_7_4, A2),
752 PINMUX_IPSR_GPSR(IP2_7_4, LCDOUT18),
753 PINMUX_IPSR_MSEL(IP2_7_4, MSIOF3_SCK_B, SEL_MSIOF3_1),
754 PINMUX_IPSR_GPSR(IP2_7_4, VI4_DATA10),
755 PINMUX_IPSR_GPSR(IP2_7_4, DU_DB2),
756 PINMUX_IPSR_MSEL(IP2_7_4, PWM5_
[all...]
H A Dpfc-r8a77965.c131 #define GPSR1_2 F_(A2, IP2_7_4)
277 #define IP2_7_4 FM(A2) FM(LCDOUT18) FM(MSIOF3_SCK_B) F_(0, 0) FM(VI4_DATA10) F_(0, 0) FM(DU_DB2) F_(0, 0) F_(0, 0) FM(PWM5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
452 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
757 PINMUX_IPSR_GPSR(IP2_7_4, A2),
758 PINMUX_IPSR_GPSR(IP2_7_4, LCDOUT18),
759 PINMUX_IPSR_MSEL(IP2_7_4, MSIOF3_SCK_B, SEL_MSIOF3_1),
760 PINMUX_IPSR_GPSR(IP2_7_4, VI4_DATA10),
761 PINMUX_IPSR_GPSR(IP2_7_4, DU_DB2),
762 PINMUX_IPSR_MSEL(IP2_7_4, PWM5_
[all...]
H A Dpfc-r8a7796.c131 #define GPSR1_2 F_(A2, IP2_7_4)
277 #define IP2_7_4 FM(A2) FM(LCDOUT18) FM(MSIOF3_SCK_B) F_(0, 0) FM(VI4_DATA10) F_(0, 0) FM(DU_DB2) F_(0, 0) F_(0, 0) FM(PWM5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
452 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
755 PINMUX_IPSR_GPSR(IP2_7_4, A2),
756 PINMUX_IPSR_GPSR(IP2_7_4, LCDOUT18),
757 PINMUX_IPSR_MSEL(IP2_7_4, MSIOF3_SCK_B, SEL_MSIOF3_1),
758 PINMUX_IPSR_GPSR(IP2_7_4, VI4_DATA10),
759 PINMUX_IPSR_GPSR(IP2_7_4, DU_DB2),
760 PINMUX_IPSR_MSEL(IP2_7_4, PWM5_
[all...]
H A Dpfc-r8a77950.c125 #define GPSR1_2 F_(A2, IP2_7_4)
271 #define IP2_7_4 FM(A2) FM(LCDOUT18) FM(MSIOF3_SCK_B) F_(0, 0) FM(VI4_DATA10) F_(0, 0) FM(DU_DB2) F_(0, 0) F_(0, 0) FM(PWM5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
437 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
744 PINMUX_IPSR_GPSR(IP2_7_4, A2),
745 PINMUX_IPSR_GPSR(IP2_7_4, LCDOUT18),
746 PINMUX_IPSR_MSEL(IP2_7_4, MSIOF3_SCK_B, SEL_MSIOF3_1),
747 PINMUX_IPSR_GPSR(IP2_7_4, VI4_DATA10),
748 PINMUX_IPSR_GPSR(IP2_7_4, DU_DB2),
749 PINMUX_IPSR_MSEL(IP2_7_4, PWM5_
[all...]
H A Dpfc-r8a77990.c231 #define IP2_7_4 FM(AVB_MDIO) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
387 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
619 PINMUX_IPSR_GPSR(IP2_7_4, AVB_MDIO),
4795 IP2_7_4
/kernel/linux/linux-6.6/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c50 #define GPSR0_17 F_(DU_DB7, IP2_7_4)
181 #define IP2_7_4 FM(DU_DB7) F_(0, 0) F_(0, 0) FM(A17) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
270 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
464 PINMUX_IPSR_GPSR(IP2_7_4, DU_DB7),
465 PINMUX_IPSR_GPSR(IP2_7_4, A17),
2259 IP2_7_4
H A Dpfc-r8a7779.c802 PINMUX_IPSR_MSEL(IP2_7_4, HSCK0, SEL_HSCIF0_0),
803 PINMUX_IPSR_MSEL(IP2_7_4, SCK1, SEL_SCIF1_0),
804 PINMUX_IPSR_GPSR(IP2_7_4, MTS),
805 PINMUX_IPSR_GPSR(IP2_7_4, PWM5),
806 PINMUX_IPSR_MSEL(IP2_7_4, SCK0_C, SEL_SCIF0_2),
807 PINMUX_IPSR_MSEL(IP2_7_4, SSI_SDATA9_B, SEL_SSI9_1),
808 PINMUX_IPSR_GPSR(IP2_7_4, SUB_TDO),
809 PINMUX_IPSR_GPSR(IP2_7_4, CC5_STATE0),
810 PINMUX_IPSR_GPSR(IP2_7_4, CC5_STATE8),
811 PINMUX_IPSR_GPSR(IP2_7_4, CC5_STATE1
[all...]
H A Dpfc-r8a77980.c52 #define GPSR0_17 F_(DU_DB7, IP2_7_4)
215 #define IP2_7_4 FM(DU_DB7) FM(MSIOF3_TXD) F_(0, 0) FM(A17) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
320 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
544 PINMUX_IPSR_GPSR(IP2_7_4, DU_DB7),
545 PINMUX_IPSR_GPSR(IP2_7_4, MSIOF3_TXD),
546 PINMUX_IPSR_GPSR(IP2_7_4, A17),
2713 IP2_7_4
H A Dpfc-r8a77995.c78 #define GPSR1_10 F_(DU_DG2, IP2_7_4)
227 #define IP2_7_4 FM(DU_DG2) FM(LCDOUT10) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
361 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
602 PINMUX_IPSR_GPSR(IP2_7_4, DU_DG2),
603 PINMUX_IPSR_GPSR(IP2_7_4, LCDOUT10),
2700 IP2_7_4
H A Dpfc-r8a77470.c619 PINMUX_IPSR_GPSR(IP2_7_4, D7),
620 PINMUX_IPSR_GPSR(IP2_7_4, HSCK2),
621 PINMUX_IPSR_MSEL(IP2_7_4, SCIF1_SCK_C, SEL_SCIF1_2),
622 PINMUX_IPSR_GPSR(IP2_7_4, IRQ6),
623 PINMUX_IPSR_GPSR(IP2_7_4, PWM5_C),
2746 /* IP2_7_4 [4] */
H A Dpfc-r8a77951.c125 #define GPSR1_2 F_(A2, IP2_7_4)
271 #define IP2_7_4 FM(A2) FM(LCDOUT18) FM(MSIOF3_SCK_B) F_(0, 0) FM(VI4_DATA10) F_(0, 0) FM(DU_DB2) F_(0, 0) F_(0, 0) FM(PWM5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
446 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
750 PINMUX_IPSR_GPSR(IP2_7_4, A2),
751 PINMUX_IPSR_GPSR(IP2_7_4, LCDOUT18),
752 PINMUX_IPSR_MSEL(IP2_7_4, MSIOF3_SCK_B, SEL_MSIOF3_1),
753 PINMUX_IPSR_GPSR(IP2_7_4, VI4_DATA10),
754 PINMUX_IPSR_GPSR(IP2_7_4, DU_DB2),
755 PINMUX_IPSR_MSEL(IP2_7_4, PWM5_
[all...]
H A Dpfc-r8a77965.c130 #define GPSR1_2 F_(A2, IP2_7_4)
276 #define IP2_7_4 FM(A2) FM(LCDOUT18) FM(MSIOF3_SCK_B) F_(0, 0) FM(VI4_DATA10) F_(0, 0) FM(DU_DB2) F_(0, 0) F_(0, 0) FM(PWM5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
451 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
756 PINMUX_IPSR_GPSR(IP2_7_4, A2),
757 PINMUX_IPSR_GPSR(IP2_7_4, LCDOUT18),
758 PINMUX_IPSR_MSEL(IP2_7_4, MSIOF3_SCK_B, SEL_MSIOF3_1),
759 PINMUX_IPSR_GPSR(IP2_7_4, VI4_DATA10),
760 PINMUX_IPSR_GPSR(IP2_7_4, DU_DB2),
761 PINMUX_IPSR_MSEL(IP2_7_4, PWM5_
[all...]
H A Dpfc-r8a7796.c130 #define GPSR1_2 F_(A2, IP2_7_4)
276 #define IP2_7_4 FM(A2) FM(LCDOUT18) FM(MSIOF3_SCK_B) F_(0, 0) FM(VI4_DATA10) F_(0, 0) FM(DU_DB2) F_(0, 0) F_(0, 0) FM(PWM5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
451 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
754 PINMUX_IPSR_GPSR(IP2_7_4, A2),
755 PINMUX_IPSR_GPSR(IP2_7_4, LCDOUT18),
756 PINMUX_IPSR_MSEL(IP2_7_4, MSIOF3_SCK_B, SEL_MSIOF3_1),
757 PINMUX_IPSR_GPSR(IP2_7_4, VI4_DATA10),
758 PINMUX_IPSR_GPSR(IP2_7_4, DU_DB2),
759 PINMUX_IPSR_MSEL(IP2_7_4, PWM5_
[all...]
H A Dpfc-r8a77990.c231 #define IP2_7_4 FM(AVB_MDIO) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
387 FM(IP0_7_4) IP0_7_4 FM(IP1_7_4) IP1_7_4 FM(IP2_7_4) IP2_7_4 FM(IP3_7_4) IP3_7_4 \
620 PINMUX_IPSR_GPSR(IP2_7_4, AVB_MDIO),
4815 IP2_7_4

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