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Searched refs:IP2_23_20 (Results 1 - 17 of 17) sorted by relevance

/kernel/linux/linux-5.10/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c35 #define GPSR0_21 F_(DU_EXODDF_DU_ODDF_DISP_CDE, IP2_23_20)
174 #define IP2_23_20 FM(DU_EXODDF_DU_ODDF_DISP_CDE) FM(MSIOF3_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
264 FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \
470 PINMUX_IPSR_GPSR(IP2_23_20, DU_EXODDF_DU_ODDF_DISP_CDE),
471 PINMUX_IPSR_GPSR(IP2_23_20, MSIOF3_SYNC),
2363 IP2_23_20
H A Dpfc-r8a77990.c114 #define GPSR2_24 F_(RD_WR_N, IP2_23_20)
235 #define IP2_23_20 FM(RD_WR_N) FM(SCL7_A) FM(AVB_AVTP_MATCH) FM(VI4_VSYNC_N) FM(TX5_B) FM(SCK3_C) FM(PWM5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
391 FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \
638 PINMUX_IPSR_GPSR(IP2_23_20, RD_WR_N),
639 PINMUX_IPSR_MSEL(IP2_23_20, SCL7_A, SEL_I2C7_0),
640 PINMUX_IPSR_GPSR(IP2_23_20, AVB_AVTP_MATCH),
641 PINMUX_IPSR_GPSR(IP2_23_20, VI4_VSYNC_N),
642 PINMUX_IPSR_GPSR(IP2_23_20, TX5_B),
643 PINMUX_IPSR_MSEL(IP2_23_20, SCK3_
[all...]
H A Dpfc-r8a77995.c63 #define GPSR1_14 F_(DU_DG6, IP2_23_20)
220 #define IP2_23_20 FM(DU_DG6) FM(LCDOUT14) FM(HRX3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
354 FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \
606 PINMUX_IPSR_GPSR(IP2_23_20, DU_DG6),
607 PINMUX_IPSR_GPSR(IP2_23_20, LCDOUT14),
608 PINMUX_IPSR_MSEL(IP2_23_20, HRX3_B, SEL_HSCIF3_1),
2644 IP2_23_20
H A Dpfc-r8a77980.c36 #define GPSR0_21 F_(DU_EXODDF_DU_ODDF_DISP_CDE, IP2_23_20)
207 #define IP2_23_20 FM(DU_EXODDF_DU_ODDF_DISP_CDE) FM(MSIOF3_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
315 FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \
554 PINMUX_IPSR_GPSR(IP2_23_20, DU_EXODDF_DU_ODDF_DISP_CDE),
555 PINMUX_IPSR_GPSR(IP2_23_20, MSIOF3_SYNC),
2785 IP2_23_20
H A Dpfc-r8a77951.c122 #define GPSR1_6 F_(A6, IP2_23_20)
278 #define IP2_23_20 FM(A6) FM(LCDOUT22) FM(MSIOF2_SS1_A) FM(RX4_B) FM(VI4_DATA14) FM(VI5_DATA14) FM(DU_DB6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
451 FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \
780 PINMUX_IPSR_GPSR(IP2_23_20, A6),
781 PINMUX_IPSR_GPSR(IP2_23_20, LCDOUT22),
782 PINMUX_IPSR_MSEL(IP2_23_20, MSIOF2_SS1_A, SEL_MSIOF2_0),
783 PINMUX_IPSR_MSEL(IP2_23_20, RX4_B, SEL_SCIF4_1),
784 PINMUX_IPSR_GPSR(IP2_23_20, VI4_DATA14),
785 PINMUX_IPSR_GPSR(IP2_23_20, VI5_DATA1
[all...]
H A Dpfc-r8a77965.c127 #define GPSR1_6 F_(A6, IP2_23_20)
281 #define IP2_23_20 FM(A6) FM(LCDOUT22) FM(MSIOF2_SS1_A) FM(RX4_B) FM(VI4_DATA14) FM(VI5_DATA14) FM(DU_DB6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
456 FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \
786 PINMUX_IPSR_GPSR(IP2_23_20, A6),
787 PINMUX_IPSR_GPSR(IP2_23_20, LCDOUT22),
788 PINMUX_IPSR_MSEL(IP2_23_20, MSIOF2_SS1_A, SEL_MSIOF2_0),
789 PINMUX_IPSR_MSEL(IP2_23_20, RX4_B, SEL_SCIF4_1),
790 PINMUX_IPSR_GPSR(IP2_23_20, VI4_DATA14),
791 PINMUX_IPSR_GPSR(IP2_23_20, VI5_DATA1
[all...]
H A Dpfc-r8a7796.c127 #define GPSR1_6 F_(A6, IP2_23_20)
281 #define IP2_23_20 FM(A6) FM(LCDOUT22) FM(MSIOF2_SS1_A) FM(RX4_B) FM(VI4_DATA14) FM(VI5_DATA14) FM(DU_DB6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
456 FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \
784 PINMUX_IPSR_GPSR(IP2_23_20, A6),
785 PINMUX_IPSR_GPSR(IP2_23_20, LCDOUT22),
786 PINMUX_IPSR_MSEL(IP2_23_20, MSIOF2_SS1_A, SEL_MSIOF2_0),
787 PINMUX_IPSR_MSEL(IP2_23_20, RX4_B, SEL_SCIF4_1),
788 PINMUX_IPSR_GPSR(IP2_23_20, VI4_DATA14),
789 PINMUX_IPSR_GPSR(IP2_23_20, VI5_DATA1
[all...]
H A Dpfc-r8a77950.c121 #define GPSR1_6 F_(A6, IP2_23_20)
277 #define IP2_23_20 FM(A6) FM(LCDOUT22) FM(MSIOF2_SS1_A) FM(RX4_B) FM(VI4_DATA14) FM(VI5_DATA14) FM(DU_DB6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
441 FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \
773 PINMUX_IPSR_GPSR(IP2_23_20, A6),
774 PINMUX_IPSR_GPSR(IP2_23_20, LCDOUT22),
775 PINMUX_IPSR_MSEL(IP2_23_20, MSIOF2_SS1_A, SEL_MSIOF2_0),
776 PINMUX_IPSR_MSEL(IP2_23_20, RX4_B, SEL_SCIF4_1),
777 PINMUX_IPSR_GPSR(IP2_23_20, VI4_DATA14),
778 PINMUX_IPSR_GPSR(IP2_23_20, VI5_DATA1
[all...]
H A Dpfc-r8a77470.c626 PINMUX_IPSR_GPSR(IP2_23_20, D11),
627 PINMUX_IPSR_MSEL(IP2_23_20, MSIOF2_TXD_A, SEL_MSIOF2_0),
628 PINMUX_IPSR_MSEL(IP2_23_20, HTX0_B, SEL_HSCIF0_1),
2813 /* IP2_23_20 [4] */
/kernel/linux/linux-6.6/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c46 #define GPSR0_21 F_(DU_EXODDF_DU_ODDF_DISP_CDE, IP2_23_20)
185 #define IP2_23_20 FM(DU_EXODDF_DU_ODDF_DISP_CDE) FM(MSIOF3_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
274 FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \
479 PINMUX_IPSR_GPSR(IP2_23_20, DU_EXODDF_DU_ODDF_DISP_CDE),
480 PINMUX_IPSR_GPSR(IP2_23_20, MSIOF3_SYNC),
2255 IP2_23_20
H A Dpfc-r8a77990.c114 #define GPSR2_24 F_(RD_WR_N, IP2_23_20)
235 #define IP2_23_20 FM(RD_WR_N) FM(SCL7_A) FM(AVB_AVTP_MATCH) FM(VI4_VSYNC_N) FM(TX5_B) FM(SCK3_C) FM(PWM5_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
391 FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \
639 PINMUX_IPSR_GPSR(IP2_23_20, RD_WR_N),
640 PINMUX_IPSR_MSEL(IP2_23_20, SCL7_A, SEL_I2C7_0),
641 PINMUX_IPSR_GPSR(IP2_23_20, AVB_AVTP_MATCH),
642 PINMUX_IPSR_GPSR(IP2_23_20, VI4_VSYNC_N),
643 PINMUX_IPSR_GPSR(IP2_23_20, TX5_B),
644 PINMUX_IPSR_MSEL(IP2_23_20, SCK3_
[all...]
H A Dpfc-r8a77995.c74 #define GPSR1_14 F_(DU_DG6, IP2_23_20)
231 #define IP2_23_20 FM(DU_DG6) FM(LCDOUT14) FM(HRX3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
365 FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \
617 PINMUX_IPSR_GPSR(IP2_23_20, DU_DG6),
618 PINMUX_IPSR_GPSR(IP2_23_20, LCDOUT14),
619 PINMUX_IPSR_MSEL(IP2_23_20, HRX3_B, SEL_HSCIF3_1),
2696 IP2_23_20
H A Dpfc-r8a77980.c48 #define GPSR0_21 F_(DU_EXODDF_DU_ODDF_DISP_CDE, IP2_23_20)
219 #define IP2_23_20 FM(DU_EXODDF_DU_ODDF_DISP_CDE) FM(MSIOF3_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
324 FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \
563 PINMUX_IPSR_GPSR(IP2_23_20, DU_EXODDF_DU_ODDF_DISP_CDE),
564 PINMUX_IPSR_GPSR(IP2_23_20, MSIOF3_SYNC),
2709 IP2_23_20
H A Dpfc-r8a77951.c121 #define GPSR1_6 F_(A6, IP2_23_20)
277 #define IP2_23_20 FM(A6) FM(LCDOUT22) FM(MSIOF2_SS1_A) FM(RX4_B) FM(VI4_DATA14) FM(VI5_DATA14) FM(DU_DB6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
450 FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \
779 PINMUX_IPSR_GPSR(IP2_23_20, A6),
780 PINMUX_IPSR_GPSR(IP2_23_20, LCDOUT22),
781 PINMUX_IPSR_MSEL(IP2_23_20, MSIOF2_SS1_A, SEL_MSIOF2_0),
782 PINMUX_IPSR_MSEL(IP2_23_20, RX4_B, SEL_SCIF4_1),
783 PINMUX_IPSR_GPSR(IP2_23_20, VI4_DATA14),
784 PINMUX_IPSR_GPSR(IP2_23_20, VI5_DATA1
[all...]
H A Dpfc-r8a77965.c126 #define GPSR1_6 F_(A6, IP2_23_20)
280 #define IP2_23_20 FM(A6) FM(LCDOUT22) FM(MSIOF2_SS1_A) FM(RX4_B) FM(VI4_DATA14) FM(VI5_DATA14) FM(DU_DB6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
455 FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \
785 PINMUX_IPSR_GPSR(IP2_23_20, A6),
786 PINMUX_IPSR_GPSR(IP2_23_20, LCDOUT22),
787 PINMUX_IPSR_MSEL(IP2_23_20, MSIOF2_SS1_A, SEL_MSIOF2_0),
788 PINMUX_IPSR_MSEL(IP2_23_20, RX4_B, SEL_SCIF4_1),
789 PINMUX_IPSR_GPSR(IP2_23_20, VI4_DATA14),
790 PINMUX_IPSR_GPSR(IP2_23_20, VI5_DATA1
[all...]
H A Dpfc-r8a7796.c126 #define GPSR1_6 F_(A6, IP2_23_20)
280 #define IP2_23_20 FM(A6) FM(LCDOUT22) FM(MSIOF2_SS1_A) FM(RX4_B) FM(VI4_DATA14) FM(VI5_DATA14) FM(DU_DB6) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) macro
455 FM(IP0_23_20) IP0_23_20 FM(IP1_23_20) IP1_23_20 FM(IP2_23_20) IP2_23_20 FM(IP3_23_20) IP3_23_20 \
783 PINMUX_IPSR_GPSR(IP2_23_20, A6),
784 PINMUX_IPSR_GPSR(IP2_23_20, LCDOUT22),
785 PINMUX_IPSR_MSEL(IP2_23_20, MSIOF2_SS1_A, SEL_MSIOF2_0),
786 PINMUX_IPSR_MSEL(IP2_23_20, RX4_B, SEL_SCIF4_1),
787 PINMUX_IPSR_GPSR(IP2_23_20, VI4_DATA14),
788 PINMUX_IPSR_GPSR(IP2_23_20, VI5_DATA1
[all...]
H A Dpfc-r8a77470.c636 PINMUX_IPSR_GPSR(IP2_23_20, D11),
637 PINMUX_IPSR_MSEL(IP2_23_20, MSIOF2_TXD_A, SEL_MSIOF2_0),
638 PINMUX_IPSR_MSEL(IP2_23_20, HTX0_B, SEL_HSCIF0_1),
2734 /* IP2_23_20 [4] */

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